summaryrefslogtreecommitdiff
path: root/arch/x86/include/asm/amd_nb.h
diff options
context:
space:
mode:
authorHans Rosenfeld <hans.rosenfeld@amd.com>2010-10-29 19:14:32 +0400
committerBorislav Petkov <borislav.petkov@amd.com>2010-11-18 17:53:06 +0300
commitf658bcfb2607bf0808966a69cf74135ce98e5c2d (patch)
treea01f768fb6b49acd701f912f426e1fd6ee4f0f56 /arch/x86/include/asm/amd_nb.h
parent9653a5c76c8677b05b45b3b999d3b39988d2a064 (diff)
downloadlinux-f658bcfb2607bf0808966a69cf74135ce98e5c2d.tar.xz
x86, cacheinfo: Cleanup L3 cache index disable support
Adaptions to the changes of the AMD northbridge caching code: instead of a bool in each l3 struct, use a flag in amd_northbridges.flags to indicate L3 cache index disable support; use a pointer to the whole northbridge instead of the misc device in the l3 struct; simplify the initialisation; dynamically generate sysfs attribute array. Signed-off-by: Hans Rosenfeld <hans.rosenfeld@amd.com> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'arch/x86/include/asm/amd_nb.h')
-rw-r--r--arch/x86/include/asm/amd_nb.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h
index 4d7ec7df7de2..6aee50d655d1 100644
--- a/arch/x86/include/asm/amd_nb.h
+++ b/arch/x86/include/asm/amd_nb.h
@@ -25,6 +25,7 @@ struct amd_northbridge_info {
extern struct amd_northbridge_info amd_northbridges;
#define AMD_NB_GART 0x1
+#define AMD_NB_L3_INDEX_DISABLE 0x2
#ifdef CONFIG_AMD_NB