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author | Juergen Gross <jgross@suse.com> | 2022-11-02 10:47:01 +0300 |
---|---|---|
committer | Borislav Petkov <bp@suse.de> | 2022-11-10 15:12:44 +0300 |
commit | d5f66d5d10611978c3a93cc94a811d74e0cf6cbc (patch) | |
tree | 6d08a9201bb9c76b2e54b39b43fcfb48ed3d745e /arch/x86/include/asm/cacheinfo.h | |
parent | 45fa71f19a2d73f157d6892a8d677a738a0414fd (diff) | |
download | linux-d5f66d5d10611978c3a93cc94a811d74e0cf6cbc.tar.xz |
x86/mtrr: Rename prepare_set() and post_set()
Rename the currently MTRR-specific functions prepare_set() and
post_set() in preparation to move them. Make them non-static and put
their prototypes into cacheinfo.h, where they will end after moving them
to their final position anyway.
Expand the comment before the functions with an introductory line and
rename two related static variables, too.
[ bp: Massage commit message. ]
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20221102074713.21493-5-jgross@suse.com
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'arch/x86/include/asm/cacheinfo.h')
-rw-r--r-- | arch/x86/include/asm/cacheinfo.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cacheinfo.h b/arch/x86/include/asm/cacheinfo.h index c3873962a7cd..6159874b4183 100644 --- a/arch/x86/include/asm/cacheinfo.h +++ b/arch/x86/include/asm/cacheinfo.h @@ -10,4 +10,7 @@ extern unsigned int memory_caching_control; void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu); void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu); +void cache_disable(void); +void cache_enable(void); + #endif /* _ASM_X86_CACHEINFO_H */ |