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authorBorislav Petkov <bp@suse.de>2017-01-09 14:41:45 +0300
committerThomas Gleixner <tglx@linutronix.de>2017-01-10 01:11:14 +0300
commit4167709bbf826512a52ebd6aafda2be104adaec9 (patch)
tree29ddbe49a559437f134819900d7b77728f5c0d5b /arch/x86/include/asm/microcode_intel.h
parentf3e2a51f568d9f33370f4e8bb05669a34223241a (diff)
downloadlinux-4167709bbf826512a52ebd6aafda2be104adaec9.tar.xz
x86/microcode/intel: Add a helper which gives the microcode revision
Since on Intel we're required to do CPUID(1) first, before reading the microcode revision MSR, let's add a special helper which does the required steps so that we don't forget to do them next time, when we want to read the microcode revision. Signed-off-by: Borislav Petkov <bp@suse.de> Link: http://lkml.kernel.org/r/20170109114147.5082-4-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/microcode_intel.h')
-rw-r--r--arch/x86/include/asm/microcode_intel.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/x86/include/asm/microcode_intel.h b/arch/x86/include/asm/microcode_intel.h
index 195becc6f780..e793fc9a9b20 100644
--- a/arch/x86/include/asm/microcode_intel.h
+++ b/arch/x86/include/asm/microcode_intel.h
@@ -52,6 +52,21 @@ struct extended_sigtable {
#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
+static inline u32 intel_get_microcode_revision(void)
+{
+ u32 rev, dummy;
+
+ native_wrmsrl(MSR_IA32_UCODE_REV, 0);
+
+ /* As documented in the SDM: Do a CPUID 1 here */
+ native_cpuid_eax(1);
+
+ /* get the current revision from MSR 0x8B */
+ native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
+
+ return rev;
+}
+
#ifdef CONFIG_MICROCODE_INTEL
extern void __init load_ucode_intel_bsp(void);
extern void load_ucode_intel_ap(void);