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| author | Dave Airlie <airlied@redhat.com> | 2023-10-23 11:20:06 +0300 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2023-10-23 11:20:06 +0300 |
| commit | 7cd62eab9babd1fed9c497141650b31168f4f430 (patch) | |
| tree | 85ef2122ca0d88b2b598f45eb071fcd1f4faa3d2 /arch/x86/include/asm/msr-index.h | |
| parent | 035fdc38c1f6ddce3544d8a489548e6cc4de508a (diff) | |
| parent | 05d3ef8bba77c1b5f98d941d8b2d4aeab8118ef1 (diff) | |
| download | linux-7cd62eab9babd1fed9c497141650b31168f4f430.tar.xz | |
BackMerge tag 'v6.6-rc7' into drm-next
This is needed to add the msm pr which is based on a higher base.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 1d111350197f..b37abb55e948 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -637,12 +637,17 @@ /* AMD Last Branch Record MSRs */ #define MSR_AMD64_LBR_SELECT 0xc000010e -/* Fam 17h MSRs */ -#define MSR_F17H_IRPERF 0xc00000e9 +/* Zen4 */ +#define MSR_ZEN4_BP_CFG 0xc001102e +#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5 +/* Zen 2 */ #define MSR_ZEN2_SPECTRAL_CHICKEN 0xc00110e3 #define MSR_ZEN2_SPECTRAL_CHICKEN_BIT BIT_ULL(1) +/* Fam 17h MSRs */ +#define MSR_F17H_IRPERF 0xc00000e9 + /* Fam 16h MSRs */ #define MSR_F16H_L2I_PERF_CTL 0xc0010230 #define MSR_F16H_L2I_PERF_CTR 0xc0010231 |