summaryrefslogtreecommitdiff
path: root/arch/x86/include/asm/special_insns.h
diff options
context:
space:
mode:
authorFenghua Yu <fenghua.yu@intel.com>2020-09-15 19:30:13 +0300
committerBorislav Petkov <bp@suse.de>2020-09-17 21:22:15 +0300
commit20f0afd1fb3d7d44f4a3db5a4b6e904410862140 (patch)
tree0a2b714214912ec3feecdd2193d0df3e51ea7851 /arch/x86/include/asm/special_insns.h
parent1478b99a76534b6c244cfe24fa616280a9441118 (diff)
downloadlinux-20f0afd1fb3d7d44f4a3db5a4b6e904410862140.tar.xz
x86/mmu: Allocate/free a PASID
A PASID is allocated for an "mm" the first time any thread binds to an SVA-capable device and is freed from the "mm" when the SVA is unbound by the last thread. It's possible for the "mm" to have different PASID values in different binding/unbinding SVA cycles. The mm's PASID (non-zero for valid PASID or 0 for invalid PASID) is propagated to a per-thread PASID MSR for all threads within the mm through IPI, context switch, or inherited. This is done to ensure that a running thread has the right PASID in the MSR matching the mm's PASID. [ bp: s/SVM/SVA/g; massage. ] Suggested-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Link: https://lkml.kernel.org/r/1600187413-163670-10-git-send-email-fenghua.yu@intel.com
Diffstat (limited to 'arch/x86/include/asm/special_insns.h')
0 files changed, 0 insertions, 0 deletions