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author | Sean Christopherson <sean.j.christopherson@intel.com> | 2020-05-02 07:32:26 +0300 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-05-13 19:15:09 +0300 |
commit | 0cc69204e77275105d5b0fc4cf3c970e3579457f (patch) | |
tree | 5ad3687e736e7797d5483d9caf296eeff4bce377 /arch/x86/kvm/kvm_cache_regs.h | |
parent | 56ba77a459a72a7d95be74355a40a91e1f6dd7f7 (diff) | |
download | linux-0cc69204e77275105d5b0fc4cf3c970e3579457f.tar.xz |
KVM: nVMX: Unconditionally validate CR3 during nested transitions
Unconditionally check the validity of the incoming CR3 during nested
VM-Enter/VM-Exit to avoid invoking kvm_read_cr3() in the common case
where the guest isn't using PAE paging. If vmcs.GUEST_CR3 hasn't yet
been cached (common case), kvm_read_cr3() will trigger a VMREAD. The
VMREAD (~30 cycles) alone is likely slower than nested_cr3_valid()
(~5 cycles if vcpu->arch.maxphyaddr gets a cache hit), and the poor
exchange only gets worse when retpolines are enabled as the call to
kvm_x86_ops.cache_reg() will incur a retpoline (60+ cycles).
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Message-Id: <20200502043234.12481-3-sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/kvm_cache_regs.h')
0 files changed, 0 insertions, 0 deletions