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author | Grant Likely <grant.likely@secretlab.ca> | 2011-06-17 18:32:26 +0400 |
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committer | Grant Likely <grant.likely@secretlab.ca> | 2011-06-17 18:32:26 +0400 |
commit | f8db4cc4f2b11bdded6c94f0d55906847474b982 (patch) | |
tree | d1b99d186edb9d203fafd896f19487125a2395af /arch/x86/oprofile/op_model_amd.c | |
parent | 2e2de2e314672c8b6644f67a35556d6df780493d (diff) | |
parent | e479c60456ef22b0869432887216186aabaed086 (diff) | |
download | linux-f8db4cc4f2b11bdded6c94f0d55906847474b982.tar.xz |
Merge branch 'spi/merge' into spi/next
Diffstat (limited to 'arch/x86/oprofile/op_model_amd.c')
-rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index 9fd8a567fe1e..9cbb710dc94b 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c @@ -609,16 +609,21 @@ static int setup_ibs_ctl(int ibs_eilvt_off) return 0; } +/* + * This runs only on the current cpu. We try to find an LVT offset and + * setup the local APIC. For this we must disable preemption. On + * success we initialize all nodes with this offset. This updates then + * the offset in the IBS_CTL per-node msr. The per-core APIC setup of + * the IBS interrupt vector is called from op_amd_setup_ctrs()/op_- + * amd_cpu_shutdown() using the new offset. + */ static int force_ibs_eilvt_setup(void) { int offset; int ret; - /* - * find the next free available EILVT entry, skip offset 0, - * pin search to this cpu - */ preempt_disable(); + /* find the next free available EILVT entry, skip offset 0 */ for (offset = 1; offset < APIC_EILVT_NR_MAX; offset++) { if (get_eilvt(offset)) break; |