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| author | Stephane Eranian <eranian@google.com> | 2016-03-03 22:50:40 +0300 |
|---|---|---|
| committer | Sasha Levin <sasha.levin@oracle.com> | 2016-04-18 15:49:24 +0300 |
| commit | 1011e8d090703e119111809f7550c8453d572444 (patch) | |
| tree | 9be352d13862f98c9a043b48f876c8ca400d3721 /arch/x86 | |
| parent | 7a6e8996cc8a8fa91a0893d957751d241067d0b9 (diff) | |
| download | linux-1011e8d090703e119111809f7550c8453d572444.tar.xz | |
perf/x86/intel: Add definition for PT PMI bit
[ Upstream commit 5690ae28e472d25e330ad0c637a5cea3fc39fb32 ]
This patch adds a definition for GLOBAL_OVFL_STATUS bit 55
which is used with the Processor Trace (PT) feature.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: <stable@vger.kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: adrian.hunter@intel.com
Cc: kan.liang@intel.com
Cc: namhyung@kernel.org
Link: http://lkml.kernel.org/r/1457034642-21837-2-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index f2d82d3cca08..024fa1a20f15 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -165,6 +165,7 @@ struct x86_pmu_capability { #define GLOBAL_STATUS_ASIF BIT_ULL(60) #define GLOBAL_STATUS_COUNTERS_FROZEN BIT_ULL(59) #define GLOBAL_STATUS_LBRS_FROZEN BIT_ULL(58) +#define GLOBAL_STATUS_TRACE_TOPAPMI BIT_ULL(55) /* * IBS cpuid feature detection |