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authorFenghua Yu <fenghua.yu@intel.com>2020-07-25 02:45:20 +0300
committerIngo Molnar <mingo@kernel.org>2020-07-25 13:17:00 +0300
commit3aae57f0c3ba57715cf89201b5a5f290684078a5 (patch)
tree2668e7b8906909f8f2697aa71ac214f42c788df5 /arch
parente00b62f0b06d0ae2b844049f216807617aff0cdb (diff)
downloadlinux-3aae57f0c3ba57715cf89201b5a5f290684078a5.tar.xz
x86/split_lock: Enable the split lock feature on Sapphire Rapids and Alder Lake CPUs
Add Sapphire Rapids and Alder Lake processors to CPU list to enumerate and enable the split lock feature. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/r/1595634320-79689-1-git-send-email-fenghua.yu@intel.com
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/intel.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 0ab48f1cdf84..b6b7b38dff5f 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -1156,6 +1156,8 @@ static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, 1),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, 1),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, 1),
+ X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, 1),
+ X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, 1),
{}
};