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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-11-17 08:24:47 +0300 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-12-11 18:47:36 +0300 |
commit | 8311ca57ef879254188e847db04e8c0c18394aba (patch) | |
tree | 6391e793e95538396e013f3936086954126a4c31 /arch | |
parent | 50c4c4e268a2d7a3e58ebb698ac74da0de40ae36 (diff) | |
download | linux-8311ca57ef879254188e847db04e8c0c18394aba.tar.xz |
arm64: dts: uniphier: use macros in dt-bindings header
The dt-bindings header was applied to the driver subsystem. I had to
wait for a merge window to use it from DT.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
5 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts index 6bdefb26b329..54c53170699a 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts @@ -50,7 +50,7 @@ &gpio { xirq0 { gpio-hog; - gpios = <120 0>; + gpios = <UNIPHIER_GPIO_IRQ(0) 0>; input; }; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 1c63d0ab8a58..ce40eb51ff68 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -8,6 +8,7 @@ */ #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/gpio/uniphier-gpio.h> /memreserve/ 0x80000000 0x02000000; @@ -100,7 +101,7 @@ emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; }; timer { diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts index 254d6795c67e..693371033c90 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts @@ -50,7 +50,7 @@ &gpio { xirq0 { gpio-hog; - gpios = <120 0>; + gpios = <UNIPHIER_GPIO_IRQ(0) 0>; input; }; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 5c81070944cc..8a3276ba2da1 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -8,6 +8,7 @@ */ #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/gpio/uniphier-gpio.h> #include <dt-bindings/thermal/thermal.h> /memreserve/ 0x80000000 0x02000000; @@ -172,7 +173,7 @@ emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; }; timer { diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index 48e733136db4..d2beadd6e249 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -8,6 +8,7 @@ */ #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/gpio/uniphier-gpio.h> /memreserve/ 0x80000000 0x02000000; @@ -128,7 +129,7 @@ emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>; }; timer { |