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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-12 11:11:47 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-12 11:11:47 +0400
commit2b684c073f32b557661eba191ce0a584020367e2 (patch)
tree3d3694ce794236fd28e12ee27689c4c4e2720e98 /arch
parentc2d33069915d1f9b3b1dcc2199af11d4e072b037 (diff)
parent9ed9c07d9b7d42fc7042247c2be283731186464f (diff)
downloadlinux-2b684c073f32b557661eba191ce0a584020367e2.tar.xz
Merge tag 'clk-for-linus-3.13' of git://git.linaro.org/people/mturquette/linux
Pull clock framework changes from Mike Turquette: "The clock changes for 3.13 are an even mix of framework improvements & bug fixes along with updates to existing clock drivers and the additional of new clock drivers" * tag 'clk-for-linus-3.13' of git://git.linaro.org/people/mturquette/linux: clk: new driver for efm32 SoC clk: of: helper for determining number of parent clocks clk/zynq: Fix possible memory leak clk: keystone: Build Keystone clock drivers clk: keystone: Add gate control clock driver clk: keystone: add Keystone PLL clock driver Documentation: Add documentation for APM X-Gene clock binding clk: arm64: Add DTS clock entry for APM X-Gene Storm SoC clk: Add APM X-Gene SoC clock driver clk: wm831x: get rid of the implementation of remove function clk: Correct lookup logic in clk_fetch_parent_index() clk: Use kcalloc() to allocate arrays clk: Add error handling to clk_fetch_parent_index()
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/apm-storm.dtsi75
1 files changed, 75 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi
index bfdc57834929..d37d7369e260 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -103,6 +103,81 @@
#size-cells = <2>;
ranges;
+ clocks {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ refclk: refclk {
+ compatible = "fixed-clock";
+ #clock-cells = <1>;
+ clock-frequency = <100000000>;
+ clock-output-names = "refclk";
+ };
+
+ pcppll: pcppll@17000100 {
+ compatible = "apm,xgene-pcppll-clock";
+ #clock-cells = <1>;
+ clocks = <&refclk 0>;
+ clock-names = "pcppll";
+ reg = <0x0 0x17000100 0x0 0x1000>;
+ clock-output-names = "pcppll";
+ type = <0>;
+ };
+
+ socpll: socpll@17000120 {
+ compatible = "apm,xgene-socpll-clock";
+ #clock-cells = <1>;
+ clocks = <&refclk 0>;
+ clock-names = "socpll";
+ reg = <0x0 0x17000120 0x0 0x1000>;
+ clock-output-names = "socpll";
+ type = <1>;
+ };
+
+ socplldiv2: socplldiv2 {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <1>;
+ clocks = <&socpll 0>;
+ clock-names = "socplldiv2";
+ clock-mult = <1>;
+ clock-div = <2>;
+ clock-output-names = "socplldiv2";
+ };
+
+ qmlclk: qmlclk {
+ compatible = "apm,xgene-device-clock";
+ #clock-cells = <1>;
+ clocks = <&socplldiv2 0>;
+ clock-names = "qmlclk";
+ reg = <0x0 0x1703C000 0x0 0x1000>;
+ reg-names = "csr-reg";
+ clock-output-names = "qmlclk";
+ };
+
+ ethclk: ethclk {
+ compatible = "apm,xgene-device-clock";
+ #clock-cells = <1>;
+ clocks = <&socplldiv2 0>;
+ clock-names = "ethclk";
+ reg = <0x0 0x17000000 0x0 0x1000>;
+ reg-names = "div-reg";
+ divider-offset = <0x238>;
+ divider-width = <0x9>;
+ divider-shift = <0x0>;
+ clock-output-names = "ethclk";
+ };
+
+ eth8clk: eth8clk {
+ compatible = "apm,xgene-device-clock";
+ #clock-cells = <1>;
+ clocks = <&ethclk 0>;
+ clock-names = "eth8clk";
+ reg = <0x0 0x1702C000 0x0 0x1000>;
+ reg-names = "csr-reg";
+ clock-output-names = "eth8clk";
+ };
+ };
+
serial0: serial@1c020000 {
device_type = "serial";
compatible = "ns16550";