summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorVladimir Murzin <vladimir.murzin@arm.com>2018-06-18 16:33:03 +0300
committerRussell King <rmk+kernel@armlinux.org.uk>2018-07-11 13:00:41 +0300
commitcea394772d3c41d04cb71a032f6ed878392bd134 (patch)
treea8bb7c1b34428872ff1806ba96d4f63b8d1aa19e /arch
parentce397d215ccd07b8ae3f71db689aedb85d56ab40 (diff)
downloadlinux-cea394772d3c41d04cb71a032f6ed878392bd134.tar.xz
ARM: 8775/1: NOMMU: Use instr_sync instead of plain isb in common code
Greg reported that commit 3c24121039c9d ("ARM: 8756/1: NOMMU: Postpone MPU activation till __after_proc_init") is causing breakage for the old Versatile platform in no-MMU mode (with out-of-tree patches): AS arch/arm/kernel/head-nommu.o arch/arm/kernel/head-nommu.S: Assembler messages: arch/arm/kernel/head-nommu.S:180: Error: selected processor does not support `isb' in ARM mode scripts/Makefile.build:417: recipe for target 'arch/arm/kernel/head-nommu.o' failed make[2]: *** [arch/arm/kernel/head-nommu.o] Error 1 Makefile:1034: recipe for target 'arch/arm/kernel' failed make[1]: *** [arch/arm/kernel] Error 2 Since the code is common for all NOMMU builds usage of the isb was a bad idea (please, note that isb also used in MPU related code which is fine because MPU has dependency on CPU_V7/CPU_V7M), instead use more robust instr_sync assembler macro. Fixes: 3c24121039c9 ("ARM: 8756/1: NOMMU: Postpone MPU activation till __after_proc_init") Reported-by: Greg Ungerer <gerg@kernel.org> Tested-by: Greg Ungerer <gerg@kernel.org> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/head-nommu.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index dd546d65a383..7a9b86978ee1 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -177,7 +177,7 @@ M_CLASS(streq r3, [r12, #PMSAv8_MAIR1])
bic r0, r0, #CR_I
#endif
mcr p15, 0, r0, c1, c0, 0 @ write control reg
- isb
+ instr_sync
#elif defined (CONFIG_CPU_V7M)
#ifdef CONFIG_ARM_MPU
ldreq r3, [r12, MPU_CTRL]