summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 06:15:03 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 06:15:03 +0400
commit06930b94d19a8641f8a2dc9d6ec27e2a5a39d17c (patch)
tree0672b1c9181fa7e1484c511d87d1ed29acfa0650 /arch
parent2e321806b681b1920b6dfa7d81bbe3d312fe1d19 (diff)
parent7094ac08cb9568a3efa1e3da177350e168c5fd96 (diff)
downloadlinux-06930b94d19a8641f8a2dc9d6ec27e2a5a39d17c.tar.xz
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
Pull m68knommu tree from Greg Ungerer: "More merge and clean up of MMU and non-MMU common files, namely signal.c and dma.c. There is also a simplification of the ColdFire GPIO setup tables. Using a couple of simple macros we make the init tables really small and easy to read, and save a couple of thousand lines of code. Also a move of all the ColdFire subarch support files into the existing coldfire directory. The sub-directories just ended up duplicating Makefiles and now only contain really simple pieces of code. This saves quite a few lines of code too. As always a couple of bugs fixes thrown in too. Oh and a new defconfig for the ColdFire platforms that support having the MMU enabled." * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (39 commits) m68k: add a defconfig for the M5475EVB ColdFire with MMU board m68knommu: unaligned.h fix for M68000 core m68k: merge the MMU and non-MMU versions of the arch dma code m68knommu: reorganize the no-MMU cache flushing to match m68k m68knommu: move the 54xx platform code into the common ColdFire code directory m68knommu: move the 532x platform code into the common ColdFire code directory m68knommu: move the 5407 platform code into the common ColdFire code directory m68knommu: move the 5307 platform code into the common ColdFire code directory m68knommu: move the 528x platform code into the common ColdFire code directory m68knommu: move the 527x platform code into the common ColdFire code directory m68knommu: move the 5272 platform code into the common ColdFire code directory m68knommu: move the 5249 platform code into the common ColdFire code directory m68knommu: move the 523x platform code into the common ColdFire code directory m68knommu: move the 520x platform code into the common ColdFire code directory m68knommu: move the 5206 platform code into the common ColdFire code directory m68knommu: simplify the ColdFire 5407 GPIO struct setup m68knommu: simplify the ColdFire 532x GPIO struct setup m68knommu: simplify the ColdFire 5307 GPIO struct setup m68knommu: simplify the ColdFire 528x GPIO struct setup m68knommu: simplify the ColdFire 527x GPIO struct setup ...
Diffstat (limited to 'arch')
-rw-r--r--arch/m68k/Makefile12
-rw-r--r--arch/m68k/configs/m5475evb_defconfig62
-rw-r--r--arch/m68k/include/asm/cacheflush_no.h32
-rw-r--r--arch/m68k/include/asm/flat.h7
-rw-r--r--arch/m68k/include/asm/m528xsim.h179
-rw-r--r--arch/m68k/include/asm/mcfgpio.h57
-rw-r--r--arch/m68k/include/asm/unaligned.h2
-rw-r--r--arch/m68k/kernel/dma.c165
-rw-r--r--arch/m68k/kernel/dma_mm.c131
-rw-r--r--arch/m68k/kernel/dma_no.c75
-rw-r--r--arch/m68k/kernel/signal.c1201
-rw-r--r--arch/m68k/kernel/signal_mm.c1115
-rw-r--r--arch/m68k/kernel/signal_no.c765
-rw-r--r--arch/m68k/platform/5206/Makefile18
-rw-r--r--arch/m68k/platform/5206/gpio.c49
-rw-r--r--arch/m68k/platform/520x/Makefile17
-rw-r--r--arch/m68k/platform/520x/gpio.c175
-rw-r--r--arch/m68k/platform/523x/Makefile17
-rw-r--r--arch/m68k/platform/523x/gpio.c284
-rw-r--r--arch/m68k/platform/5249/Makefile18
-rw-r--r--arch/m68k/platform/5249/gpio.c65
-rw-r--r--arch/m68k/platform/5272/Makefile18
-rw-r--r--arch/m68k/platform/5272/gpio.c81
-rw-r--r--arch/m68k/platform/527x/Makefile18
-rw-r--r--arch/m68k/platform/527x/gpio.c609
-rw-r--r--arch/m68k/platform/528x/Makefile18
-rw-r--r--arch/m68k/platform/528x/gpio.c438
-rw-r--r--arch/m68k/platform/5307/Makefile20
-rw-r--r--arch/m68k/platform/5307/gpio.c49
-rw-r--r--arch/m68k/platform/532x/Makefile18
-rw-r--r--arch/m68k/platform/532x/gpio.c337
-rw-r--r--arch/m68k/platform/5407/Makefile18
-rw-r--r--arch/m68k/platform/5407/gpio.c49
-rw-r--r--arch/m68k/platform/54xx/Makefile19
-rw-r--r--arch/m68k/platform/coldfire/Makefile28
-rw-r--r--arch/m68k/platform/coldfire/firebee.c (renamed from arch/m68k/platform/54xx/firebee.c)0
-rw-r--r--arch/m68k/platform/coldfire/gpio.c4
-rw-r--r--arch/m68k/platform/coldfire/intc-5249.c (renamed from arch/m68k/platform/5249/intc2.c)0
-rw-r--r--arch/m68k/platform/coldfire/intc-5272.c (renamed from arch/m68k/platform/5272/intc.c)0
-rw-r--r--arch/m68k/platform/coldfire/m5206.c (renamed from arch/m68k/platform/5206/config.c)9
-rw-r--r--arch/m68k/platform/coldfire/m520x.c (renamed from arch/m68k/platform/520x/config.c)16
-rw-r--r--arch/m68k/platform/coldfire/m523x.c (renamed from arch/m68k/platform/523x/config.c)22
-rw-r--r--arch/m68k/platform/coldfire/m5249.c (renamed from arch/m68k/platform/5249/config.c)10
-rw-r--r--arch/m68k/platform/coldfire/m5272.c (renamed from arch/m68k/platform/5272/config.c)11
-rw-r--r--arch/m68k/platform/coldfire/m527x.c (renamed from arch/m68k/platform/527x/config.c)43
-rw-r--r--arch/m68k/platform/coldfire/m528x.c (renamed from arch/m68k/platform/528x/config.c)31
-rw-r--r--arch/m68k/platform/coldfire/m5307.c (renamed from arch/m68k/platform/5307/config.c)9
-rw-r--r--arch/m68k/platform/coldfire/m532x.c (renamed from arch/m68k/platform/532x/config.c)25
-rw-r--r--arch/m68k/platform/coldfire/m5407.c (renamed from arch/m68k/platform/5407/config.c)9
-rw-r--r--arch/m68k/platform/coldfire/m54xx.c (renamed from arch/m68k/platform/54xx/config.c)7
-rw-r--r--arch/m68k/platform/coldfire/nettel.c (renamed from arch/m68k/platform/5307/nettel.c)0
51 files changed, 1807 insertions, 4555 deletions
diff --git a/arch/m68k/Makefile b/arch/m68k/Makefile
index 41b3bc926bb1..b7f2e2d5cd2e 100644
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -116,18 +116,6 @@ core-$(CONFIG_M68000) += arch/m68k/platform/68328/
core-$(CONFIG_M68EZ328) += arch/m68k/platform/68EZ328/
core-$(CONFIG_M68VZ328) += arch/m68k/platform/68VZ328/
core-$(CONFIG_COLDFIRE) += arch/m68k/platform/coldfire/
-core-$(CONFIG_M5206) += arch/m68k/platform/5206/
-core-$(CONFIG_M5206e) += arch/m68k/platform/5206/
-core-$(CONFIG_M520x) += arch/m68k/platform/520x/
-core-$(CONFIG_M523x) += arch/m68k/platform/523x/
-core-$(CONFIG_M5249) += arch/m68k/platform/5249/
-core-$(CONFIG_M527x) += arch/m68k/platform/527x/
-core-$(CONFIG_M5272) += arch/m68k/platform/5272/
-core-$(CONFIG_M528x) += arch/m68k/platform/528x/
-core-$(CONFIG_M5307) += arch/m68k/platform/5307/
-core-$(CONFIG_M532x) += arch/m68k/platform/532x/
-core-$(CONFIG_M5407) += arch/m68k/platform/5407/
-core-$(CONFIG_M54xx) += arch/m68k/platform/54xx/
all: zImage
diff --git a/arch/m68k/configs/m5475evb_defconfig b/arch/m68k/configs/m5475evb_defconfig
new file mode 100644
index 000000000000..c5018a68819b
--- /dev/null
+++ b/arch/m68k/configs/m5475evb_defconfig
@@ -0,0 +1,62 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_SWAP is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_SHMEM is not set
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+CONFIG_MODULES=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_COLDFIRE=y
+CONFIG_M547x=y
+CONFIG_CLOCK_SET=y
+CONFIG_CLOCK_FREQ=266000000
+# CONFIG_4KSTACKS is not set
+CONFIG_RAMBASE=0x0
+CONFIG_RAMSIZE=0x2000000
+CONFIG_VECTORBASE=0x0
+CONFIG_MBAR=0xff000000
+CONFIG_KERNELBASE=0x20000
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_UCLINUX=y
+CONFIG_BLK_DEV_RAM=y
+# CONFIG_INPUT is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+CONFIG_SERIAL_MCF=y
+CONFIG_SERIAL_MCF_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_MTD=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_BOOTPARAM=y
+CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h
index cb88aa96c4f1..7cafb537d03c 100644
--- a/arch/m68k/include/asm/cacheflush_no.h
+++ b/arch/m68k/include/asm/cacheflush_no.h
@@ -30,11 +30,8 @@
void mcf_cache_push(void);
-static inline void __flush_cache_all(void)
+static inline void __clear_cache_all(void)
{
-#ifdef CACHE_PUSH
- mcf_cache_push();
-#endif
#ifdef CACHE_INVALIDATE
__asm__ __volatile__ (
"movel %0, %%d0\n\t"
@@ -44,6 +41,14 @@ static inline void __flush_cache_all(void)
#endif
}
+static inline void __flush_cache_all(void)
+{
+#ifdef CACHE_PUSH
+ mcf_cache_push();
+#endif
+ __clear_cache_all();
+}
+
/*
* Some ColdFire parts implement separate instruction and data caches,
* on those we should just flush the appropriate cache. If we don't need
@@ -76,4 +81,23 @@ static inline void __flush_dcache_all(void)
__asm__ __volatile__ ( "nop" );
#endif
}
+
+/*
+ * Push cache entries at supplied address. We want to write back any dirty
+ * data and the invalidate the cache lines associated with this address.
+ */
+static inline void cache_push(unsigned long paddr, int len)
+{
+ __flush_cache_all();
+}
+
+/*
+ * Clear cache entries at supplied address (that is don't write back any
+ * dirty data).
+ */
+static inline void cache_clear(unsigned long paddr, int len)
+{
+ __clear_cache_all();
+}
+
#endif /* _M68KNOMMU_CACHEFLUSH_H */
diff --git a/arch/m68k/include/asm/flat.h b/arch/m68k/include/asm/flat.h
index a0e290793978..f9454b89a51b 100644
--- a/arch/m68k/include/asm/flat.h
+++ b/arch/m68k/include/asm/flat.h
@@ -11,6 +11,11 @@
#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp)
#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp)
#define flat_get_relocate_addr(rel) (rel)
-#define flat_set_persistent(relval, p) 0
+
+static inline int flat_set_persistent(unsigned long relval,
+ unsigned long *persistent)
+{
+ return 0;
+}
#endif /* __M68KNOMMU_FLAT_H__ */
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 569476fba18c..d63b99ff7ff7 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -97,100 +97,81 @@
/*
* GPIO registers
*/
-#define MCFGPIO_PORTA (MCF_IPSBAR + 0x00100000)
-#define MCFGPIO_PORTB (MCF_IPSBAR + 0x00100001)
-#define MCFGPIO_PORTC (MCF_IPSBAR + 0x00100002)
-#define MCFGPIO_PORTD (MCF_IPSBAR + 0x00100003)
-#define MCFGPIO_PORTE (MCF_IPSBAR + 0x00100004)
-#define MCFGPIO_PORTF (MCF_IPSBAR + 0x00100005)
-#define MCFGPIO_PORTG (MCF_IPSBAR + 0x00100006)
-#define MCFGPIO_PORTH (MCF_IPSBAR + 0x00100007)
-#define MCFGPIO_PORTJ (MCF_IPSBAR + 0x00100008)
-#define MCFGPIO_PORTDD (MCF_IPSBAR + 0x00100009)
-#define MCFGPIO_PORTEH (MCF_IPSBAR + 0x0010000A)
-#define MCFGPIO_PORTEL (MCF_IPSBAR + 0x0010000B)
-#define MCFGPIO_PORTAS (MCF_IPSBAR + 0x0010000C)
-#define MCFGPIO_PORTQS (MCF_IPSBAR + 0x0010000D)
-#define MCFGPIO_PORTSD (MCF_IPSBAR + 0x0010000E)
-#define MCFGPIO_PORTTC (MCF_IPSBAR + 0x0010000F)
-#define MCFGPIO_PORTTD (MCF_IPSBAR + 0x00100010)
-#define MCFGPIO_PORTUA (MCF_IPSBAR + 0x00100011)
-
-#define MCFGPIO_DDRA (MCF_IPSBAR + 0x00100014)
-#define MCFGPIO_DDRB (MCF_IPSBAR + 0x00100015)
-#define MCFGPIO_DDRC (MCF_IPSBAR + 0x00100016)
-#define MCFGPIO_DDRD (MCF_IPSBAR + 0x00100017)
-#define MCFGPIO_DDRE (MCF_IPSBAR + 0x00100018)
-#define MCFGPIO_DDRF (MCF_IPSBAR + 0x00100019)
-#define MCFGPIO_DDRG (MCF_IPSBAR + 0x0010001A)
-#define MCFGPIO_DDRH (MCF_IPSBAR + 0x0010001B)
-#define MCFGPIO_DDRJ (MCF_IPSBAR + 0x0010001C)
-#define MCFGPIO_DDRDD (MCF_IPSBAR + 0x0010001D)
-#define MCFGPIO_DDREH (MCF_IPSBAR + 0x0010001E)
-#define MCFGPIO_DDREL (MCF_IPSBAR + 0x0010001F)
-#define MCFGPIO_DDRAS (MCF_IPSBAR + 0x00100020)
-#define MCFGPIO_DDRQS (MCF_IPSBAR + 0x00100021)
-#define MCFGPIO_DDRSD (MCF_IPSBAR + 0x00100022)
-#define MCFGPIO_DDRTC (MCF_IPSBAR + 0x00100023)
-#define MCFGPIO_DDRTD (MCF_IPSBAR + 0x00100024)
-#define MCFGPIO_DDRUA (MCF_IPSBAR + 0x00100025)
-
-#define MCFGPIO_PORTAP (MCF_IPSBAR + 0x00100028)
-#define MCFGPIO_PORTBP (MCF_IPSBAR + 0x00100029)
-#define MCFGPIO_PORTCP (MCF_IPSBAR + 0x0010002A)
-#define MCFGPIO_PORTDP (MCF_IPSBAR + 0x0010002B)
-#define MCFGPIO_PORTEP (MCF_IPSBAR + 0x0010002C)
-#define MCFGPIO_PORTFP (MCF_IPSBAR + 0x0010002D)
-#define MCFGPIO_PORTGP (MCF_IPSBAR + 0x0010002E)
-#define MCFGPIO_PORTHP (MCF_IPSBAR + 0x0010002F)
-#define MCFGPIO_PORTJP (MCF_IPSBAR + 0x00100030)
-#define MCFGPIO_PORTDDP (MCF_IPSBAR + 0x00100031)
-#define MCFGPIO_PORTEHP (MCF_IPSBAR + 0x00100032)
-#define MCFGPIO_PORTELP (MCF_IPSBAR + 0x00100033)
-#define MCFGPIO_PORTASP (MCF_IPSBAR + 0x00100034)
-#define MCFGPIO_PORTQSP (MCF_IPSBAR + 0x00100035)
-#define MCFGPIO_PORTSDP (MCF_IPSBAR + 0x00100036)
-#define MCFGPIO_PORTTCP (MCF_IPSBAR + 0x00100037)
-#define MCFGPIO_PORTTDP (MCF_IPSBAR + 0x00100038)
-#define MCFGPIO_PORTUAP (MCF_IPSBAR + 0x00100039)
-
-#define MCFGPIO_SETA (MCF_IPSBAR + 0x00100028)
-#define MCFGPIO_SETB (MCF_IPSBAR + 0x00100029)
-#define MCFGPIO_SETC (MCF_IPSBAR + 0x0010002A)
-#define MCFGPIO_SETD (MCF_IPSBAR + 0x0010002B)
-#define MCFGPIO_SETE (MCF_IPSBAR + 0x0010002C)
-#define MCFGPIO_SETF (MCF_IPSBAR + 0x0010002D)
-#define MCFGPIO_SETG (MCF_IPSBAR + 0x0010002E)
-#define MCFGPIO_SETH (MCF_IPSBAR + 0x0010002F)
-#define MCFGPIO_SETJ (MCF_IPSBAR + 0x00100030)
-#define MCFGPIO_SETDD (MCF_IPSBAR + 0x00100031)
-#define MCFGPIO_SETEH (MCF_IPSBAR + 0x00100032)
-#define MCFGPIO_SETEL (MCF_IPSBAR + 0x00100033)
-#define MCFGPIO_SETAS (MCF_IPSBAR + 0x00100034)
-#define MCFGPIO_SETQS (MCF_IPSBAR + 0x00100035)
-#define MCFGPIO_SETSD (MCF_IPSBAR + 0x00100036)
-#define MCFGPIO_SETTC (MCF_IPSBAR + 0x00100037)
-#define MCFGPIO_SETTD (MCF_IPSBAR + 0x00100038)
-#define MCFGPIO_SETUA (MCF_IPSBAR + 0x00100039)
-
-#define MCFGPIO_CLRA (MCF_IPSBAR + 0x0010003C)
-#define MCFGPIO_CLRB (MCF_IPSBAR + 0x0010003D)
-#define MCFGPIO_CLRC (MCF_IPSBAR + 0x0010003E)
-#define MCFGPIO_CLRD (MCF_IPSBAR + 0x0010003F)
-#define MCFGPIO_CLRE (MCF_IPSBAR + 0x00100040)
-#define MCFGPIO_CLRF (MCF_IPSBAR + 0x00100041)
-#define MCFGPIO_CLRG (MCF_IPSBAR + 0x00100042)
-#define MCFGPIO_CLRH (MCF_IPSBAR + 0x00100043)
-#define MCFGPIO_CLRJ (MCF_IPSBAR + 0x00100044)
-#define MCFGPIO_CLRDD (MCF_IPSBAR + 0x00100045)
-#define MCFGPIO_CLREH (MCF_IPSBAR + 0x00100046)
-#define MCFGPIO_CLREL (MCF_IPSBAR + 0x00100047)
-#define MCFGPIO_CLRAS (MCF_IPSBAR + 0x00100048)
-#define MCFGPIO_CLRQS (MCF_IPSBAR + 0x00100049)
-#define MCFGPIO_CLRSD (MCF_IPSBAR + 0x0010004A)
-#define MCFGPIO_CLRTC (MCF_IPSBAR + 0x0010004B)
-#define MCFGPIO_CLRTD (MCF_IPSBAR + 0x0010004C)
-#define MCFGPIO_CLRUA (MCF_IPSBAR + 0x0010004D)
+#define MCFGPIO_PODR_A (MCF_IPSBAR + 0x00100000)
+#define MCFGPIO_PODR_B (MCF_IPSBAR + 0x00100001)
+#define MCFGPIO_PODR_C (MCF_IPSBAR + 0x00100002)
+#define MCFGPIO_PODR_D (MCF_IPSBAR + 0x00100003)
+#define MCFGPIO_PODR_E (MCF_IPSBAR + 0x00100004)
+#define MCFGPIO_PODR_F (MCF_IPSBAR + 0x00100005)
+#define MCFGPIO_PODR_G (MCF_IPSBAR + 0x00100006)
+#define MCFGPIO_PODR_H (MCF_IPSBAR + 0x00100007)
+#define MCFGPIO_PODR_J (MCF_IPSBAR + 0x00100008)
+#define MCFGPIO_PODR_DD (MCF_IPSBAR + 0x00100009)
+#define MCFGPIO_PODR_EH (MCF_IPSBAR + 0x0010000A)
+#define MCFGPIO_PODR_EL (MCF_IPSBAR + 0x0010000B)
+#define MCFGPIO_PODR_AS (MCF_IPSBAR + 0x0010000C)
+#define MCFGPIO_PODR_QS (MCF_IPSBAR + 0x0010000D)
+#define MCFGPIO_PODR_SD (MCF_IPSBAR + 0x0010000E)
+#define MCFGPIO_PODR_TC (MCF_IPSBAR + 0x0010000F)
+#define MCFGPIO_PODR_TD (MCF_IPSBAR + 0x00100010)
+#define MCFGPIO_PODR_UA (MCF_IPSBAR + 0x00100011)
+
+#define MCFGPIO_PDDR_A (MCF_IPSBAR + 0x00100014)
+#define MCFGPIO_PDDR_B (MCF_IPSBAR + 0x00100015)
+#define MCFGPIO_PDDR_C (MCF_IPSBAR + 0x00100016)
+#define MCFGPIO_PDDR_D (MCF_IPSBAR + 0x00100017)
+#define MCFGPIO_PDDR_E (MCF_IPSBAR + 0x00100018)
+#define MCFGPIO_PDDR_F (MCF_IPSBAR + 0x00100019)
+#define MCFGPIO_PDDR_G (MCF_IPSBAR + 0x0010001A)
+#define MCFGPIO_PDDR_H (MCF_IPSBAR + 0x0010001B)
+#define MCFGPIO_PDDR_J (MCF_IPSBAR + 0x0010001C)
+#define MCFGPIO_PDDR_DD (MCF_IPSBAR + 0x0010001D)
+#define MCFGPIO_PDDR_EH (MCF_IPSBAR + 0x0010001E)
+#define MCFGPIO_PDDR_EL (MCF_IPSBAR + 0x0010001F)
+#define MCFGPIO_PDDR_AS (MCF_IPSBAR + 0x00100020)
+#define MCFGPIO_PDDR_QS (MCF_IPSBAR + 0x00100021)
+#define MCFGPIO_PDDR_SD (MCF_IPSBAR + 0x00100022)
+#define MCFGPIO_PDDR_TC (MCF_IPSBAR + 0x00100023)
+#define MCFGPIO_PDDR_TD (MCF_IPSBAR + 0x00100024)
+#define MCFGPIO_PDDR_UA (MCF_IPSBAR + 0x00100025)
+
+#define MCFGPIO_PPDSDR_A (MCF_IPSBAR + 0x00100028)
+#define MCFGPIO_PPDSDR_B (MCF_IPSBAR + 0x00100029)
+#define MCFGPIO_PPDSDR_C (MCF_IPSBAR + 0x0010002A)
+#define MCFGPIO_PPDSDR_D (MCF_IPSBAR + 0x0010002B)
+#define MCFGPIO_PPDSDR_E (MCF_IPSBAR + 0x0010002C)
+#define MCFGPIO_PPDSDR_F (MCF_IPSBAR + 0x0010002D)
+#define MCFGPIO_PPDSDR_G (MCF_IPSBAR + 0x0010002E)
+#define MCFGPIO_PPDSDR_H (MCF_IPSBAR + 0x0010002F)
+#define MCFGPIO_PPDSDR_J (MCF_IPSBAR + 0x00100030)
+#define MCFGPIO_PPDSDR_DD (MCF_IPSBAR + 0x00100031)
+#define MCFGPIO_PPDSDR_EH (MCF_IPSBAR + 0x00100032)
+#define MCFGPIO_PPDSDR_EL (MCF_IPSBAR + 0x00100033)
+#define MCFGPIO_PPDSDR_AS (MCF_IPSBAR + 0x00100034)
+#define MCFGPIO_PPDSDR_QS (MCF_IPSBAR + 0x00100035)
+#define MCFGPIO_PPDSDR_SD (MCF_IPSBAR + 0x00100036)
+#define MCFGPIO_PPDSDR_TC (MCF_IPSBAR + 0x00100037)
+#define MCFGPIO_PPDSDR_TD (MCF_IPSBAR + 0x00100038)
+#define MCFGPIO_PPDSDR_UA (MCF_IPSBAR + 0x00100039)
+
+#define MCFGPIO_PCLRR_A (MCF_IPSBAR + 0x0010003C)
+#define MCFGPIO_PCLRR_B (MCF_IPSBAR + 0x0010003D)
+#define MCFGPIO_PCLRR_C (MCF_IPSBAR + 0x0010003E)
+#define MCFGPIO_PCLRR_D (MCF_IPSBAR + 0x0010003F)
+#define MCFGPIO_PCLRR_E (MCF_IPSBAR + 0x00100040)
+#define MCFGPIO_PCLRR_F (MCF_IPSBAR + 0x00100041)
+#define MCFGPIO_PCLRR_G (MCF_IPSBAR + 0x00100042)
+#define MCFGPIO_PCLRR_H (MCF_IPSBAR + 0x00100043)
+#define MCFGPIO_PCLRR_J (MCF_IPSBAR + 0x00100044)
+#define MCFGPIO_PCLRR_DD (MCF_IPSBAR + 0x00100045)
+#define MCFGPIO_PCLRR_EH (MCF_IPSBAR + 0x00100046)
+#define MCFGPIO_PCLRR_EL (MCF_IPSBAR + 0x00100047)
+#define MCFGPIO_PCLRR_AS (MCF_IPSBAR + 0x00100048)
+#define MCFGPIO_PCLRR_QS (MCF_IPSBAR + 0x00100049)
+#define MCFGPIO_PCLRR_SD (MCF_IPSBAR + 0x0010004A)
+#define MCFGPIO_PCLRR_TC (MCF_IPSBAR + 0x0010004B)
+#define MCFGPIO_PCLRR_TD (MCF_IPSBAR + 0x0010004C)
+#define MCFGPIO_PCLRR_UA (MCF_IPSBAR + 0x0010004D)
#define MCFGPIO_PBCDPAR (MCF_IPSBAR + 0x00100050)
#define MCFGPIO_PFPAR (MCF_IPSBAR + 0x00100051)
@@ -242,11 +223,11 @@
* definitions for generic gpio support
*
*/
-#define MCFGPIO_PODR MCFGPIO_PORTA /* port output data */
-#define MCFGPIO_PDDR MCFGPIO_DDRA /* port data direction */
-#define MCFGPIO_PPDR MCFGPIO_PORTAP /* port pin data */
-#define MCFGPIO_SETR MCFGPIO_SETA /* set output */
-#define MCFGPIO_CLRR MCFGPIO_CLRA /* clr output */
+#define MCFGPIO_PODR MCFGPIO_PODR_A /* port output data */
+#define MCFGPIO_PDDR MCFGPIO_PDDR_A /* port data direction */
+#define MCFGPIO_PPDR MCFGPIO_PPDSDR_A/* port pin data */
+#define MCFGPIO_SETR MCFGPIO_PPDSDR_A/* set output */
+#define MCFGPIO_CLRR MCFGPIO_PCLRR_A /* clr output */
#define MCFGPIO_IRQ_MAX 8
#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h
index ee5e4ccce89e..fe468eaa51e0 100644
--- a/arch/m68k/include/asm/mcfgpio.h
+++ b/arch/m68k/include/asm/mcfgpio.h
@@ -29,6 +29,9 @@ struct mcf_gpio_chip {
const u8 *gpio_to_pinmux;
};
+extern struct mcf_gpio_chip mcf_gpio_chips[];
+extern unsigned int mcf_gpio_chips_size;
+
int mcf_gpio_direction_input(struct gpio_chip *, unsigned);
int mcf_gpio_get_value(struct gpio_chip *, unsigned);
int mcf_gpio_direction_output(struct gpio_chip *, unsigned, int);
@@ -37,4 +40,58 @@ void mcf_gpio_set_value_fast(struct gpio_chip *, unsigned, int);
int mcf_gpio_request(struct gpio_chip *, unsigned);
void mcf_gpio_free(struct gpio_chip *, unsigned);
+/*
+ * Define macros to ease the pain of setting up the GPIO tables. There
+ * are two cases we need to deal with here, they cover all currently
+ * available ColdFire GPIO hardware. There are of course minor differences
+ * in the layout and number of bits in each ColdFire part, but the macros
+ * take all that in.
+ *
+ * Firstly is the conventional GPIO registers where we toggle individual
+ * bits in a register, preserving the other bits in the register. For
+ * lack of a better term I have called this the slow method.
+ */
+#define MCFGPS(mlabel, mbase, mngpio, mpddr, mpodr, mppdr) \
+ { \
+ .gpio_chip = { \
+ .label = #mlabel, \
+ .request = mcf_gpio_request, \
+ .free = mcf_gpio_free, \
+ .direction_input = mcf_gpio_direction_input, \
+ .direction_output = mcf_gpio_direction_output,\
+ .get = mcf_gpio_get_value, \
+ .set = mcf_gpio_set_value, \
+ .base = mbase, \
+ .ngpio = mngpio, \
+ }, \
+ .pddr = (void __iomem *) mpddr, \
+ .podr = (void __iomem *) mpodr, \
+ .ppdr = (void __iomem *) mppdr, \
+ }
+
+/*
+ * Secondly is the faster case, where we have set and clear registers
+ * that allow us to set or clear a bit with a single write, not having
+ * to worry about preserving other bits.
+ */
+#define MCFGPF(mlabel, mbase, mngpio) \
+ { \
+ .gpio_chip = { \
+ .label = #mlabel, \
+ .request = mcf_gpio_request, \
+ .free = mcf_gpio_free, \
+ .direction_input = mcf_gpio_direction_input, \
+ .direction_output = mcf_gpio_direction_output,\
+ .get = mcf_gpio_get_value, \
+ .set = mcf_gpio_set_value_fast, \
+ .base = mbase, \
+ .ngpio = mngpio, \
+ }, \
+ .pddr = (void __iomem *) MCFGPIO_PDDR_##mlabel, \
+ .podr = (void __iomem *) MCFGPIO_PODR_##mlabel, \
+ .ppdr = (void __iomem *) MCFGPIO_PPDSDR_##mlabel, \
+ .setr = (void __iomem *) MCFGPIO_PPDSDR_##mlabel, \
+ .clrr = (void __iomem *) MCFGPIO_PCLRR_##mlabel, \
+ }
+
#endif
diff --git a/arch/m68k/include/asm/unaligned.h b/arch/m68k/include/asm/unaligned.h
index 019caa740c21..f4043ae63db1 100644
--- a/arch/m68k/include/asm/unaligned.h
+++ b/arch/m68k/include/asm/unaligned.h
@@ -2,7 +2,7 @@
#define _ASM_M68K_UNALIGNED_H
-#ifdef CONFIG_COLDFIRE
+#if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68000)
#include <linux/unaligned/be_struct.h>
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/generic.h>
diff --git a/arch/m68k/kernel/dma.c b/arch/m68k/kernel/dma.c
index 90e8cb726c8c..f6daf6e15d2e 100644
--- a/arch/m68k/kernel/dma.c
+++ b/arch/m68k/kernel/dma.c
@@ -1,5 +1,164 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#undef DEBUG
+
+#include <linux/dma-mapping.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/scatterlist.h>
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+#include <linux/export.h>
+
+#include <asm/pgalloc.h>
+
#ifdef CONFIG_MMU
-#include "dma_mm.c"
+
+void *dma_alloc_coherent(struct device *dev, size_t size,
+ dma_addr_t *handle, gfp_t flag)
+{
+ struct page *page, **map;
+ pgprot_t pgprot;
+ void *addr;
+ int i, order;
+
+ pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);
+
+ size = PAGE_ALIGN(size);
+ order = get_order(size);
+
+ page = alloc_pages(flag, order);
+ if (!page)
+ return NULL;
+
+ *handle = page_to_phys(page);
+ map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA);
+ if (!map) {
+ __free_pages(page, order);
+ return NULL;
+ }
+ split_page(page, order);
+
+ order = 1 << order;
+ size >>= PAGE_SHIFT;
+ map[0] = page;
+ for (i = 1; i < size; i++)
+ map[i] = page + i;
+ for (; i < order; i++)
+ __free_page(page + i);
+ pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
+ if (CPU_IS_040_OR_060)
+ pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
+ else
+ pgprot_val(pgprot) |= _PAGE_NOCACHE030;
+ addr = vmap(map, size, VM_MAP, pgprot);
+ kfree(map);
+
+ return addr;
+}
+
+void dma_free_coherent(struct device *dev, size_t size,
+ void *addr, dma_addr_t handle)
+{
+ pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
+ vfree(addr);
+}
+
#else
-#include "dma_no.c"
-#endif
+
+#include <asm/cacheflush.h>
+
+void *dma_alloc_coherent(struct device *dev, size_t size,
+ dma_addr_t *dma_handle, gfp_t gfp)
+{
+ void *ret;
+ /* ignore region specifiers */
+ gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
+
+ if (dev == NULL || (*dev->dma_mask < 0xffffffff))
+ gfp |= GFP_DMA;
+ ret = (void *)__get_free_pages(gfp, get_order(size));
+
+ if (ret != NULL) {
+ memset(ret, 0, size);
+ *dma_handle = virt_to_phys(ret);
+ }
+ return ret;
+}
+
+void dma_free_coherent(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle)
+{
+ free_pages((unsigned long)vaddr, get_order(size));
+}
+
+#endif /* CONFIG_MMU */
+
+EXPORT_SYMBOL(dma_alloc_coherent);
+EXPORT_SYMBOL(dma_free_coherent);
+
+void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
+ size_t size, enum dma_data_direction dir)
+{
+ switch (dir) {
+ case DMA_TO_DEVICE:
+ cache_push(handle, size);
+ break;
+ case DMA_FROM_DEVICE:
+ cache_clear(handle, size);
+ break;
+ default:
+ if (printk_ratelimit())
+ printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
+ break;
+ }
+}
+EXPORT_SYMBOL(dma_sync_single_for_device);
+
+void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
+ enum dma_data_direction dir)
+{
+ int i;
+
+ for (i = 0; i < nents; sg++, i++)
+ dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
+}
+EXPORT_SYMBOL(dma_sync_sg_for_device);
+
+dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
+ enum dma_data_direction dir)
+{
+ dma_addr_t handle = virt_to_bus(addr);
+
+ dma_sync_single_for_device(dev, handle, size, dir);
+ return handle;
+}
+EXPORT_SYMBOL(dma_map_single);
+
+dma_addr_t dma_map_page(struct device *dev, struct page *page,
+ unsigned long offset, size_t size,
+ enum dma_data_direction dir)
+{
+ dma_addr_t handle = page_to_phys(page) + offset;
+
+ dma_sync_single_for_device(dev, handle, size, dir);
+ return handle;
+}
+EXPORT_SYMBOL(dma_map_page);
+
+int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+ enum dma_data_direction dir)
+{
+ int i;
+
+ for (i = 0; i < nents; sg++, i++) {
+ sg->dma_address = sg_phys(sg);
+ dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
+ }
+ return nents;
+}
+EXPORT_SYMBOL(dma_map_sg);
diff --git a/arch/m68k/kernel/dma_mm.c b/arch/m68k/kernel/dma_mm.c
deleted file mode 100644
index a3c471b523f2..000000000000
--- a/arch/m68k/kernel/dma_mm.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#undef DEBUG
-
-#include <linux/dma-mapping.h>
-#include <linux/device.h>
-#include <linux/kernel.h>
-#include <linux/scatterlist.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/export.h>
-
-#include <asm/pgalloc.h>
-
-void *dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *handle, gfp_t flag)
-{
- struct page *page, **map;
- pgprot_t pgprot;
- void *addr;
- int i, order;
-
- pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);
-
- size = PAGE_ALIGN(size);
- order = get_order(size);
-
- page = alloc_pages(flag, order);
- if (!page)
- return NULL;
-
- *handle = page_to_phys(page);
- map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA);
- if (!map) {
- __free_pages(page, order);
- return NULL;
- }
- split_page(page, order);
-
- order = 1 << order;
- size >>= PAGE_SHIFT;
- map[0] = page;
- for (i = 1; i < size; i++)
- map[i] = page + i;
- for (; i < order; i++)
- __free_page(page + i);
- pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
- if (CPU_IS_040_OR_060)
- pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
- else
- pgprot_val(pgprot) |= _PAGE_NOCACHE030;
- addr = vmap(map, size, VM_MAP, pgprot);
- kfree(map);
-
- return addr;
-}
-EXPORT_SYMBOL(dma_alloc_coherent);
-
-void dma_free_coherent(struct device *dev, size_t size,
- void *addr, dma_addr_t handle)
-{
- pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
- vfree(addr);
-}
-EXPORT_SYMBOL(dma_free_coherent);
-
-void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
- size_t size, enum dma_data_direction dir)
-{
- switch (dir) {
- case DMA_TO_DEVICE:
- cache_push(handle, size);
- break;
- case DMA_FROM_DEVICE:
- cache_clear(handle, size);
- break;
- default:
- if (printk_ratelimit())
- printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
- break;
- }
-}
-EXPORT_SYMBOL(dma_sync_single_for_device);
-
-void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
-{
- int i;
-
- for (i = 0; i < nents; sg++, i++)
- dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
-}
-EXPORT_SYMBOL(dma_sync_sg_for_device);
-
-dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
- enum dma_data_direction dir)
-{
- dma_addr_t handle = virt_to_bus(addr);
-
- dma_sync_single_for_device(dev, handle, size, dir);
- return handle;
-}
-EXPORT_SYMBOL(dma_map_single);
-
-dma_addr_t dma_map_page(struct device *dev, struct page *page,
- unsigned long offset, size_t size,
- enum dma_data_direction dir)
-{
- dma_addr_t handle = page_to_phys(page) + offset;
-
- dma_sync_single_for_device(dev, handle, size, dir);
- return handle;
-}
-EXPORT_SYMBOL(dma_map_page);
-
-int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
-{
- int i;
-
- for (i = 0; i < nents; sg++, i++) {
- sg->dma_address = sg_phys(sg);
- dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
- }
- return nents;
-}
-EXPORT_SYMBOL(dma_map_sg);
diff --git a/arch/m68k/kernel/dma_no.c b/arch/m68k/kernel/dma_no.c
deleted file mode 100644
index f1dc3fc71bc2..000000000000
--- a/arch/m68k/kernel/dma_no.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Dynamic DMA mapping support.
- *
- * We never have any address translations to worry about, so this
- * is just alloc/free.
- */
-
-#include <linux/types.h>
-#include <linux/gfp.h>
-#include <linux/mm.h>
-#include <linux/device.h>
-#include <linux/dma-mapping.h>
-#include <linux/export.h>
-#include <asm/cacheflush.h>
-
-void *dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t gfp)
-{
- void *ret;
- /* ignore region specifiers */
- gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
-
- if (dev == NULL || (*dev->dma_mask < 0xffffffff))
- gfp |= GFP_DMA;
- ret = (void *)__get_free_pages(gfp, get_order(size));
-
- if (ret != NULL) {
- memset(ret, 0, size);
- *dma_handle = virt_to_phys(ret);
- }
- return ret;
-}
-
-void dma_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
-{
- free_pages((unsigned long)vaddr, get_order(size));
-}
-
-void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
- size_t size, enum dma_data_direction dir)
-{
- switch (dir) {
- case DMA_TO_DEVICE:
- flush_dcache_range(handle, size);
- break;
- case DMA_FROM_DEVICE:
- /* Should be clear already */
- break;
- default:
- if (printk_ratelimit())
- printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
- break;
- }
-}
-
-EXPORT_SYMBOL(dma_sync_single_for_device);
-dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
- enum dma_data_direction dir)
-{
- dma_addr_t handle = virt_to_phys(addr);
- flush_dcache_range(handle, size);
- return handle;
-}
-EXPORT_SYMBOL(dma_map_single);
-
-dma_addr_t dma_map_page(struct device *dev, struct page *page,
- unsigned long offset, size_t size,
- enum dma_data_direction dir)
-{
- dma_addr_t handle = page_to_phys(page) + offset;
- dma_sync_single_for_device(dev, handle, size, dir);
- return handle;
-}
-EXPORT_SYMBOL(dma_map_page);
diff --git a/arch/m68k/kernel/signal.c b/arch/m68k/kernel/signal.c
index 2e25713e2ead..1747c7030a33 100644
--- a/arch/m68k/kernel/signal.c
+++ b/arch/m68k/kernel/signal.c
@@ -1,5 +1,1202 @@
+/*
+ * linux/arch/m68k/kernel/signal.c
+ *
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/*
+ * Linux/m68k support by Hamish Macdonald
+ *
+ * 68060 fixes by Jesper Skov
+ *
+ * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab
+ *
+ * mathemu support by Roman Zippel
+ * (Note: fpstate in the signal context is completely ignored for the emulator
+ * and the internal floating point format is put on stack)
+ */
+
+/*
+ * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
+ * Atari :-) Current limitation: Only one sigstack can be active at one time.
+ * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
+ * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
+ * signal handlers!
+ */
+
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/syscalls.h>
+#include <linux/errno.h>
+#include <linux/wait.h>
+#include <linux/ptrace.h>
+#include <linux/unistd.h>
+#include <linux/stddef.h>
+#include <linux/highuid.h>
+#include <linux/personality.h>
+#include <linux/tty.h>
+#include <linux/binfmts.h>
+#include <linux/module.h>
+
+#include <asm/setup.h>
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+#include <asm/traps.h>
+#include <asm/ucontext.h>
+
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
#ifdef CONFIG_MMU
-#include "signal_mm.c"
+
+/*
+ * Handle the slight differences in classic 68k and ColdFire trap frames.
+ */
+#ifdef CONFIG_COLDFIRE
+#define FORMAT 4
+#define FMT4SIZE 0
#else
-#include "signal_no.c"
+#define FORMAT 0
+#define FMT4SIZE sizeof(((struct frame *)0)->un.fmt4)
#endif
+
+static const int frame_size_change[16] = {
+ [1] = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
+ [2] = sizeof(((struct frame *)0)->un.fmt2),
+ [3] = sizeof(((struct frame *)0)->un.fmt3),
+ [4] = FMT4SIZE,
+ [5] = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
+ [6] = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
+ [7] = sizeof(((struct frame *)0)->un.fmt7),
+ [8] = -1, /* sizeof(((struct frame *)0)->un.fmt8), */
+ [9] = sizeof(((struct frame *)0)->un.fmt9),
+ [10] = sizeof(((struct frame *)0)->un.fmta),
+ [11] = sizeof(((struct frame *)0)->un.fmtb),
+ [12] = -1, /* sizeof(((struct frame *)0)->un.fmtc), */
+ [13] = -1, /* sizeof(((struct frame *)0)->un.fmtd), */
+ [14] = -1, /* sizeof(((struct frame *)0)->un.fmte), */
+ [15] = -1, /* sizeof(((struct frame *)0)->un.fmtf), */
+};
+
+static inline int frame_extra_sizes(int f)
+{
+ return frame_size_change[f];
+}
+
+int handle_kernel_fault(struct pt_regs *regs)
+{
+ const struct exception_table_entry *fixup;
+ struct pt_regs *tregs;
+
+ /* Are we prepared to handle this kernel fault? */
+ fixup = search_exception_tables(regs->pc);
+ if (!fixup)
+ return 0;
+
+ /* Create a new four word stack frame, discarding the old one. */
+ regs->stkadj = frame_extra_sizes(regs->format);
+ tregs = (struct pt_regs *)((long)regs + regs->stkadj);
+ tregs->vector = regs->vector;
+ tregs->format = FORMAT;
+ tregs->pc = fixup->fixup;
+ tregs->sr = regs->sr;
+
+ return 1;
+}
+
+void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
+{
+ if (regs->orig_d0 < 0)
+ return;
+ switch (regs->d0) {
+ case -ERESTARTNOHAND:
+ case -ERESTARTSYS:
+ case -ERESTARTNOINTR:
+ regs->d0 = regs->orig_d0;
+ regs->orig_d0 = -1;
+ regs->pc -= 2;
+ break;
+ }
+}
+
+static inline void push_cache (unsigned long vaddr)
+{
+ /*
+ * Using the old cache_push_v() was really a big waste.
+ *
+ * What we are trying to do is to flush 8 bytes to ram.
+ * Flushing 2 cache lines of 16 bytes is much cheaper than
+ * flushing 1 or 2 pages, as previously done in
+ * cache_push_v().
+ * Jes
+ */
+ if (CPU_IS_040) {
+ unsigned long temp;
+
+ __asm__ __volatile__ (".chip 68040\n\t"
+ "nop\n\t"
+ "ptestr (%1)\n\t"
+ "movec %%mmusr,%0\n\t"
+ ".chip 68k"
+ : "=r" (temp)
+ : "a" (vaddr));
+
+ temp &= PAGE_MASK;
+ temp |= vaddr & ~PAGE_MASK;
+
+ __asm__ __volatile__ (".chip 68040\n\t"
+ "nop\n\t"
+ "cpushl %%bc,(%0)\n\t"
+ ".chip 68k"
+ : : "a" (temp));
+ }
+ else if (CPU_IS_060) {
+ unsigned long temp;
+ __asm__ __volatile__ (".chip 68060\n\t"
+ "plpar (%0)\n\t"
+ ".chip 68k"
+ : "=a" (temp)
+ : "0" (vaddr));
+ __asm__ __volatile__ (".chip 68060\n\t"
+ "cpushl %%bc,(%0)\n\t"
+ ".chip 68k"
+ : : "a" (temp));
+ } else if (!CPU_IS_COLDFIRE) {
+ /*
+ * 68030/68020 have no writeback cache;
+ * still need to clear icache.
+ * Note that vaddr is guaranteed to be long word aligned.
+ */
+ unsigned long temp;
+ asm volatile ("movec %%cacr,%0" : "=r" (temp));
+ temp += 4;
+ asm volatile ("movec %0,%%caar\n\t"
+ "movec %1,%%cacr"
+ : : "r" (vaddr), "r" (temp));
+ asm volatile ("movec %0,%%caar\n\t"
+ "movec %1,%%cacr"
+ : : "r" (vaddr + 4), "r" (temp));
+ }
+}
+
+static inline void adjustformat(struct pt_regs *regs)
+{
+}
+
+static inline void save_a5_state(struct sigcontext *sc, struct pt_regs *regs)
+{
+}
+
+#else /* CONFIG_MMU */
+
+void ret_from_user_signal(void);
+void ret_from_user_rt_signal(void);
+
+static inline int frame_extra_sizes(int f)
+{
+ /* No frame size adjustments required on non-MMU CPUs */
+ return 0;
+}
+
+static inline void adjustformat(struct pt_regs *regs)
+{
+ ((struct switch_stack *)regs - 1)->a5 = current->mm->start_data;
+ /*
+ * set format byte to make stack appear modulo 4, which it will
+ * be when doing the rte
+ */
+ regs->format = 0x4;
+}
+
+static inline void save_a5_state(struct sigcontext *sc, struct pt_regs *regs)
+{
+ sc->sc_a5 = ((struct switch_stack *)regs - 1)->a5;
+}
+
+static inline void push_cache(unsigned long vaddr)
+{
+}
+
+#endif /* CONFIG_MMU */
+
+/*
+ * Atomically swap in the new signal mask, and wait for a signal.
+ */
+asmlinkage int
+sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
+{
+ mask &= _BLOCKABLE;
+ spin_lock_irq(&current->sighand->siglock);
+ current->saved_sigmask = current->blocked;
+ siginitset(&current->blocked, mask);
+ recalc_sigpending();
+ spin_unlock_irq(&current->sighand->siglock);
+
+ current->state = TASK_INTERRUPTIBLE;
+ schedule();
+ set_restore_sigmask();
+
+ return -ERESTARTNOHAND;
+}
+
+asmlinkage int
+sys_sigaction(int sig, const struct old_sigaction __user *act,
+ struct old_sigaction __user *oact)
+{
+ struct k_sigaction new_ka, old_ka;
+ int ret;
+
+ if (act) {
+ old_sigset_t mask;
+ if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
+ __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
+ __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
+ __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
+ __get_user(mask, &act->sa_mask))
+ return -EFAULT;
+ siginitset(&new_ka.sa.sa_mask, mask);
+ }
+
+ ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+
+ if (!ret && oact) {
+ if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
+ __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
+ __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
+ __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
+ __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
+ return -EFAULT;
+ }
+
+ return ret;
+}
+
+asmlinkage int
+sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
+{
+ return do_sigaltstack(uss, uoss, rdusp());
+}
+
+
+/*
+ * Do a signal return; undo the signal stack.
+ *
+ * Keep the return code on the stack quadword aligned!
+ * That makes the cache flush below easier.
+ */
+
+struct sigframe
+{
+ char __user *pretcode;
+ int sig;
+ int code;
+ struct sigcontext __user *psc;
+ char retcode[8];
+ unsigned long extramask[_NSIG_WORDS-1];
+ struct sigcontext sc;
+};
+
+struct rt_sigframe
+{
+ char __user *pretcode;
+ int sig;
+ struct siginfo __user *pinfo;
+ void __user *puc;
+ char retcode[8];
+ struct siginfo info;
+ struct ucontext uc;
+};
+
+#define FPCONTEXT_SIZE 216
+#define uc_fpstate uc_filler[0]
+#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
+#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
+
+#ifdef CONFIG_FPU
+
+static unsigned char fpu_version; /* version number of fpu, set by setup_frame */
+
+static inline int restore_fpu_state(struct sigcontext *sc)
+{
+ int err = 1;
+
+ if (FPU_IS_EMU) {
+ /* restore registers */
+ memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
+ memcpy(current->thread.fp, sc->sc_fpregs, 24);
+ return 0;
+ }
+
+ if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
+ /* Verify the frame format. */
+ if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
+ (sc->sc_fpstate[0] != fpu_version))
+ goto out;
+ if (CPU_IS_020_OR_030) {
+ if (m68k_fputype & FPU_68881 &&
+ !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
+ goto out;
+ if (m68k_fputype & FPU_68882 &&
+ !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
+ goto out;
+ } else if (CPU_IS_040) {
+ if (!(sc->sc_fpstate[1] == 0x00 ||
+ sc->sc_fpstate[1] == 0x28 ||
+ sc->sc_fpstate[1] == 0x60))
+ goto out;
+ } else if (CPU_IS_060) {
+ if (!(sc->sc_fpstate[3] == 0x00 ||
+ sc->sc_fpstate[3] == 0x60 ||
+ sc->sc_fpstate[3] == 0xe0))
+ goto out;
+ } else if (CPU_IS_COLDFIRE) {
+ if (!(sc->sc_fpstate[0] == 0x00 ||
+ sc->sc_fpstate[0] == 0x05 ||
+ sc->sc_fpstate[0] == 0xe5))
+ goto out;
+ } else
+ goto out;
+
+ if (CPU_IS_COLDFIRE) {
+ __asm__ volatile ("fmovemd %0,%%fp0-%%fp1\n\t"
+ "fmovel %1,%%fpcr\n\t"
+ "fmovel %2,%%fpsr\n\t"
+ "fmovel %3,%%fpiar"
+ : /* no outputs */
+ : "m" (sc->sc_fpregs[0]),
+ "m" (sc->sc_fpcntl[0]),
+ "m" (sc->sc_fpcntl[1]),
+ "m" (sc->sc_fpcntl[2]));
+ } else {
+ __asm__ volatile (".chip 68k/68881\n\t"
+ "fmovemx %0,%%fp0-%%fp1\n\t"
+ "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
+ ".chip 68k"
+ : /* no outputs */
+ : "m" (*sc->sc_fpregs),
+ "m" (*sc->sc_fpcntl));
+ }
+ }
+
+ if (CPU_IS_COLDFIRE) {
+ __asm__ volatile ("frestore %0" : : "m" (*sc->sc_fpstate));
+ } else {
+ __asm__ volatile (".chip 68k/68881\n\t"
+ "frestore %0\n\t"
+ ".chip 68k"
+ : : "m" (*sc->sc_fpstate));
+ }
+ err = 0;
+
+out:
+ return err;
+}
+
+static inline int rt_restore_fpu_state(struct ucontext __user *uc)
+{
+ unsigned char fpstate[FPCONTEXT_SIZE];
+ int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
+ fpregset_t fpregs;
+ int err = 1;
+
+ if (FPU_IS_EMU) {
+ /* restore fpu control register */
+ if (__copy_from_user(current->thread.fpcntl,
+ uc->uc_mcontext.fpregs.f_fpcntl, 12))
+ goto out;
+ /* restore all other fpu register */
+ if (__copy_from_user(current->thread.fp,
+ uc->uc_mcontext.fpregs.f_fpregs, 96))
+ goto out;
+ return 0;
+ }
+
+ if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
+ goto out;
+ if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
+ if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
+ context_size = fpstate[1];
+ /* Verify the frame format. */
+ if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
+ (fpstate[0] != fpu_version))
+ goto out;
+ if (CPU_IS_020_OR_030) {
+ if (m68k_fputype & FPU_68881 &&
+ !(context_size == 0x18 || context_size == 0xb4))
+ goto out;
+ if (m68k_fputype & FPU_68882 &&
+ !(context_size == 0x38 || context_size == 0xd4))
+ goto out;
+ } else if (CPU_IS_040) {
+ if (!(context_size == 0x00 ||
+ context_size == 0x28 ||
+ context_size == 0x60))
+ goto out;
+ } else if (CPU_IS_060) {
+ if (!(fpstate[3] == 0x00 ||
+ fpstate[3] == 0x60 ||
+ fpstate[3] == 0xe0))
+ goto out;
+ } else if (CPU_IS_COLDFIRE) {
+ if (!(fpstate[3] == 0x00 ||
+ fpstate[3] == 0x05 ||
+ fpstate[3] == 0xe5))
+ goto out;
+ } else
+ goto out;
+ if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
+ sizeof(fpregs)))
+ goto out;
+
+ if (CPU_IS_COLDFIRE) {
+ __asm__ volatile ("fmovemd %0,%%fp0-%%fp7\n\t"
+ "fmovel %1,%%fpcr\n\t"
+ "fmovel %2,%%fpsr\n\t"
+ "fmovel %3,%%fpiar"
+ : /* no outputs */
+ : "m" (fpregs.f_fpregs[0]),
+ "m" (fpregs.f_fpcntl[0]),
+ "m" (fpregs.f_fpcntl[1]),
+ "m" (fpregs.f_fpcntl[2]));
+ } else {
+ __asm__ volatile (".chip 68k/68881\n\t"
+ "fmovemx %0,%%fp0-%%fp7\n\t"
+ "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
+ ".chip 68k"
+ : /* no outputs */
+ : "m" (*fpregs.f_fpregs),
+ "m" (*fpregs.f_fpcntl));
+ }
+ }
+ if (context_size &&
+ __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
+ context_size))
+ goto out;
+
+ if (CPU_IS_COLDFIRE) {
+ __asm__ volatile ("frestore %0" : : "m" (*fpstate));
+ } else {
+ __asm__ volatile (".chip 68k/68881\n\t"
+ "frestore %0\n\t"
+ ".chip 68k"
+ : : "m" (*fpstate));
+ }
+ err = 0;
+
+out:
+ return err;
+}
+
+/*
+ * Set up a signal frame.
+ */
+static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
+{
+ if (FPU_IS_EMU) {
+ /* save registers */
+ memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
+ memcpy(sc->sc_fpregs, current->thread.fp, 24);
+ return;
+ }
+
+ if (CPU_IS_COLDFIRE) {
+ __asm__ volatile ("fsave %0"
+ : : "m" (*sc->sc_fpstate) : "memory");
+ } else {
+ __asm__ volatile (".chip 68k/68881\n\t"
+ "fsave %0\n\t"
+ ".chip 68k"
+ : : "m" (*sc->sc_fpstate) : "memory");
+ }
+
+ if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
+ fpu_version = sc->sc_fpstate[0];
+ if (CPU_IS_020_OR_030 &&
+ regs->vector >= (VEC_FPBRUC * 4) &&
+ regs->vector <= (VEC_FPNAN * 4)) {
+ /* Clear pending exception in 68882 idle frame */
+ if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
+ sc->sc_fpstate[0x38] |= 1 << 3;
+ }
+
+ if (CPU_IS_COLDFIRE) {
+ __asm__ volatile ("fmovemd %%fp0-%%fp1,%0\n\t"
+ "fmovel %%fpcr,%1\n\t"
+ "fmovel %%fpsr,%2\n\t"
+ "fmovel %%fpiar,%3"
+ : "=m" (sc->sc_fpregs[0]),
+ "=m" (sc->sc_fpcntl[0]),
+ "=m" (sc->sc_fpcntl[1]),
+ "=m" (sc->sc_fpcntl[2])
+ : /* no inputs */
+ : "memory");
+ } else {
+ __asm__ volatile (".chip 68k/68881\n\t"
+ "fmovemx %%fp0-%%fp1,%0\n\t"
+ "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
+ ".chip 68k"
+ : "=m" (*sc->sc_fpregs),
+ "=m" (*sc->sc_fpcntl)
+ : /* no inputs */
+ : "memory");
+ }
+ }
+}
+
+static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
+{
+ unsigned char fpstate[FPCONTEXT_SIZE];
+ int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
+ int err = 0;
+
+ if (FPU_IS_EMU) {
+ /* save fpu control register */
+ err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
+ current->thread.fpcntl, 12);
+ /* save all other fpu register */
+ err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
+ current->thread.fp, 96);
+ return err;
+ }
+
+ if (CPU_IS_COLDFIRE) {
+ __asm__ volatile ("fsave %0" : : "m" (*fpstate) : "memory");
+ } else {
+ __asm__ volatile (".chip 68k/68881\n\t"
+ "fsave %0\n\t"
+ ".chip 68k"
+ : : "m" (*fpstate) : "memory");
+ }
+
+ err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
+ if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
+ fpregset_t fpregs;
+ if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
+ context_size = fpstate[1];
+ fpu_version = fpstate[0];
+ if (CPU_IS_020_OR_030 &&
+ regs->vector >= (VEC_FPBRUC * 4) &&
+ regs->vector <= (VEC_FPNAN * 4)) {
+ /* Clear pending exception in 68882 idle frame */
+ if (*(unsigned short *) fpstate == 0x1f38)
+ fpstate[0x38] |= 1 << 3;
+ }
+ if (CPU_IS_COLDFIRE) {
+ __asm__ volatile ("fmovemd %%fp0-%%fp7,%0\n\t"
+ "fmovel %%fpcr,%1\n\t"
+ "fmovel %%fpsr,%2\n\t"
+ "fmovel %%fpiar,%3"
+ : "=m" (fpregs.f_fpregs[0]),
+ "=m" (fpregs.f_fpcntl[0]),
+ "=m" (fpregs.f_fpcntl[1]),
+ "=m" (fpregs.f_fpcntl[2])
+ : /* no inputs */
+ : "memory");
+ } else {
+ __asm__ volatile (".chip 68k/68881\n\t"
+ "fmovemx %%fp0-%%fp7,%0\n\t"
+ "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
+ ".chip 68k"
+ : "=m" (*fpregs.f_fpregs),
+ "=m" (*fpregs.f_fpcntl)
+ : /* no inputs */
+ : "memory");
+ }
+ err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
+ sizeof(fpregs));
+ }
+ if (context_size)
+ err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
+ context_size);
+ return err;
+}
+
+#else /* CONFIG_FPU */
+
+/*
+ * For the case with no FPU configured these all do nothing.
+ */
+static inline int restore_fpu_state(struct sigcontext *sc)
+{
+ return 0;
+}
+
+static inline int rt_restore_fpu_state(struct ucontext __user *uc)
+{
+ return 0;
+}
+
+static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
+{
+}
+
+static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
+{
+ return 0;
+}
+
+#endif /* CONFIG_FPU */
+
+static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
+ void __user *fp)
+{
+ int fsize = frame_extra_sizes(formatvec >> 12);
+ if (fsize < 0) {
+ /*
+ * user process trying to return with weird frame format
+ */
+#ifdef DEBUG
+ printk("user process returning with weird frame format\n");
+#endif
+ return 1;
+ }
+ if (!fsize) {
+ regs->format = formatvec >> 12;
+ regs->vector = formatvec & 0xfff;
+ } else {
+ struct switch_stack *sw = (struct switch_stack *)regs - 1;
+ unsigned long buf[fsize / 2]; /* yes, twice as much */
+
+ /* that'll make sure that expansion won't crap over data */
+ if (copy_from_user(buf + fsize / 4, fp, fsize))
+ return 1;
+
+ /* point of no return */
+ regs->format = formatvec >> 12;
+ regs->vector = formatvec & 0xfff;
+#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
+ __asm__ __volatile__ (
+#ifdef CONFIG_COLDFIRE
+ " movel %0,%/sp\n\t"
+ " bra ret_from_signal\n"
+#else
+ " movel %0,%/a0\n\t"
+ " subl %1,%/a0\n\t" /* make room on stack */
+ " movel %/a0,%/sp\n\t" /* set stack pointer */
+ /* move switch_stack and pt_regs */
+ "1: movel %0@+,%/a0@+\n\t"
+ " dbra %2,1b\n\t"
+ " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */
+ " lsrl #2,%1\n\t"
+ " subql #1,%1\n\t"
+ /* copy to the gap we'd made */
+ "2: movel %4@+,%/a0@+\n\t"
+ " dbra %1,2b\n\t"
+ " bral ret_from_signal\n"
+#endif
+ : /* no outputs, it doesn't ever return */
+ : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
+ "n" (frame_offset), "a" (buf + fsize/4)
+ : "a0");
+#undef frame_offset
+ }
+ return 0;
+}
+
+static inline int
+restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)
+{
+ int formatvec;
+ struct sigcontext context;
+ int err = 0;
+
+ /* Always make any pending restarted system calls return -EINTR */
+ current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
+ /* get previous context */
+ if (copy_from_user(&context, usc, sizeof(context)))
+ goto badframe;
+
+ /* restore passed registers */
+ regs->d0 = context.sc_d0;
+ regs->d1 = context.sc_d1;
+ regs->a0 = context.sc_a0;
+ regs->a1 = context.sc_a1;
+ regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
+ regs->pc = context.sc_pc;
+ regs->orig_d0 = -1; /* disable syscall checks */
+ wrusp(context.sc_usp);
+ formatvec = context.sc_formatvec;
+
+ err = restore_fpu_state(&context);
+
+ if (err || mangle_kernel_stack(regs, formatvec, fp))
+ goto badframe;
+
+ return 0;
+
+badframe:
+ return 1;
+}
+
+static inline int
+rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
+ struct ucontext __user *uc)
+{
+ int temp;
+ greg_t __user *gregs = uc->uc_mcontext.gregs;
+ unsigned long usp;
+ int err;
+
+ /* Always make any pending restarted system calls return -EINTR */
+ current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
+ err = __get_user(temp, &uc->uc_mcontext.version);
+ if (temp != MCONTEXT_VERSION)
+ goto badframe;
+ /* restore passed registers */
+ err |= __get_user(regs->d0, &gregs[0]);
+ err |= __get_user(regs->d1, &gregs[1]);
+ err |= __get_user(regs->d2, &gregs[2]);
+ err |= __get_user(regs->d3, &gregs[3]);
+ err |= __get_user(regs->d4, &gregs[4]);
+ err |= __get_user(regs->d5, &gregs[5]);
+ err |= __get_user(sw->d6, &gregs[6]);
+ err |= __get_user(sw->d7, &gregs[7]);
+ err |= __get_user(regs->a0, &gregs[8]);
+ err |= __get_user(regs->a1, &gregs[9]);
+ err |= __get_user(regs->a2, &gregs[10]);
+ err |= __get_user(sw->a3, &gregs[11]);
+ err |= __get_user(sw->a4, &gregs[12]);
+ err |= __get_user(sw->a5, &gregs[13]);
+ err |= __get_user(sw->a6, &gregs[14]);
+ err |= __get_user(usp, &gregs[15]);
+ wrusp(usp);
+ err |= __get_user(regs->pc, &gregs[16]);
+ err |= __get_user(temp, &gregs[17]);
+ regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
+ regs->orig_d0 = -1; /* disable syscall checks */
+ err |= __get_user(temp, &uc->uc_formatvec);
+
+ err |= rt_restore_fpu_state(uc);
+
+ if (err || do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
+ goto badframe;
+
+ if (mangle_kernel_stack(regs, temp, &uc->uc_extra))
+ goto badframe;
+
+ return 0;
+
+badframe:
+ return 1;
+}
+
+asmlinkage int do_sigreturn(unsigned long __unused)
+{
+ struct switch_stack *sw = (struct switch_stack *) &__unused;
+ struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+ unsigned long usp = rdusp();
+ struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
+ sigset_t set;
+
+ if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+ goto badframe;
+ if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
+ (_NSIG_WORDS > 1 &&
+ __copy_from_user(&set.sig[1], &frame->extramask,
+ sizeof(frame->extramask))))
+ goto badframe;
+
+ sigdelsetmask(&set, ~_BLOCKABLE);
+ current->blocked = set;
+ recalc_sigpending();
+
+ if (restore_sigcontext(regs, &frame->sc, frame + 1))
+ goto badframe;
+ return regs->d0;
+
+badframe:
+ force_sig(SIGSEGV, current);
+ return 0;
+}
+
+asmlinkage int do_rt_sigreturn(unsigned long __unused)
+{
+ struct switch_stack *sw = (struct switch_stack *) &__unused;
+ struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+ unsigned long usp = rdusp();
+ struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
+ sigset_t set;
+
+ if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+ goto badframe;
+ if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
+ goto badframe;
+
+ sigdelsetmask(&set, ~_BLOCKABLE);
+ current->blocked = set;
+ recalc_sigpending();
+
+ if (rt_restore_ucontext(regs, sw, &frame->uc))
+ goto badframe;
+ return regs->d0;
+
+badframe:
+ force_sig(SIGSEGV, current);
+ return 0;
+}
+
+static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
+ unsigned long mask)
+{
+ sc->sc_mask = mask;
+ sc->sc_usp = rdusp();
+ sc->sc_d0 = regs->d0;
+ sc->sc_d1 = regs->d1;
+ sc->sc_a0 = regs->a0;
+ sc->sc_a1 = regs->a1;
+ sc->sc_sr = regs->sr;
+ sc->sc_pc = regs->pc;
+ sc->sc_formatvec = regs->format << 12 | regs->vector;
+ save_a5_state(sc, regs);
+ save_fpu_state(sc, regs);
+}
+
+static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
+{
+ struct switch_stack *sw = (struct switch_stack *)regs - 1;
+ greg_t __user *gregs = uc->uc_mcontext.gregs;
+ int err = 0;
+
+ err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
+ err |= __put_user(regs->d0, &gregs[0]);
+ err |= __put_user(regs->d1, &gregs[1]);
+ err |= __put_user(regs->d2, &gregs[2]);
+ err |= __put_user(regs->d3, &gregs[3]);
+ err |= __put_user(regs->d4, &gregs[4]);
+ err |= __put_user(regs->d5, &gregs[5]);
+ err |= __put_user(sw->d6, &gregs[6]);
+ err |= __put_user(sw->d7, &gregs[7]);
+ err |= __put_user(regs->a0, &gregs[8]);
+ err |= __put_user(regs->a1, &gregs[9]);
+ err |= __put_user(regs->a2, &gregs[10]);
+ err |= __put_user(sw->a3, &gregs[11]);
+ err |= __put_user(sw->a4, &gregs[12]);
+ err |= __put_user(sw->a5, &gregs[13]);
+ err |= __put_user(sw->a6, &gregs[14]);
+ err |= __put_user(rdusp(), &gregs[15]);
+ err |= __put_user(regs->pc, &gregs[16]);
+ err |= __put_user(regs->sr, &gregs[17]);
+ err |= __put_user((regs->format << 12) | regs->vector, &uc->uc_formatvec);
+ err |= rt_save_fpu_state(uc, regs);
+ return err;
+}
+
+static inline void __user *
+get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
+{
+ unsigned long usp;
+
+ /* Default to using normal stack. */
+ usp = rdusp();
+
+ /* This is the X/Open sanctioned signal stack switching. */
+ if (ka->sa.sa_flags & SA_ONSTACK) {
+ if (!sas_ss_flags(usp))
+ usp = current->sas_ss_sp + current->sas_ss_size;
+ }
+ return (void __user *)((usp - frame_size) & -8UL);
+}
+
+static int setup_frame (int sig, struct k_sigaction *ka,
+ sigset_t *set, struct pt_regs *regs)
+{
+ struct sigframe __user *frame;
+ int fsize = frame_extra_sizes(regs->format);
+ struct sigcontext context;
+ int err = 0;
+
+ if (fsize < 0) {
+#ifdef DEBUG
+ printk ("setup_frame: Unknown frame format %#x\n",
+ regs->format);
+#endif
+ goto give_sigsegv;
+ }
+
+ frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);
+
+ if (fsize)
+ err |= copy_to_user (frame + 1, regs + 1, fsize);
+
+ err |= __put_user((current_thread_info()->exec_domain
+ && current_thread_info()->exec_domain->signal_invmap
+ && sig < 32
+ ? current_thread_info()->exec_domain->signal_invmap[sig]
+ : sig),
+ &frame->sig);
+
+ err |= __put_user(regs->vector, &frame->code);
+ err |= __put_user(&frame->sc, &frame->psc);
+
+ if (_NSIG_WORDS > 1)
+ err |= copy_to_user(frame->extramask, &set->sig[1],
+ sizeof(frame->extramask));
+
+ setup_sigcontext(&context, regs, set->sig[0]);
+ err |= copy_to_user (&frame->sc, &context, sizeof(context));
+
+ /* Set up to return from userspace. */
+#ifdef CONFIG_MMU
+ err |= __put_user(frame->retcode, &frame->pretcode);
+ /* moveq #,d0; trap #0 */
+ err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
+ (long __user *)(frame->retcode));
+#else
+ err |= __put_user((void *) ret_from_user_signal, &frame->pretcode);
+#endif
+
+ if (err)
+ goto give_sigsegv;
+
+ push_cache ((unsigned long) &frame->retcode);
+
+ /*
+ * Set up registers for signal handler. All the state we are about
+ * to destroy is successfully copied to sigframe.
+ */
+ wrusp ((unsigned long) frame);
+ regs->pc = (unsigned long) ka->sa.sa_handler;
+ adjustformat(regs);
+
+ /*
+ * This is subtle; if we build more than one sigframe, all but the
+ * first one will see frame format 0 and have fsize == 0, so we won't
+ * screw stkadj.
+ */
+ if (fsize)
+ regs->stkadj = fsize;
+
+ /* Prepare to skip over the extra stuff in the exception frame. */
+ if (regs->stkadj) {
+ struct pt_regs *tregs =
+ (struct pt_regs *)((ulong)regs + regs->stkadj);
+#ifdef DEBUG
+ printk("Performing stackadjust=%04x\n", regs->stkadj);
+#endif
+ /* This must be copied with decreasing addresses to
+ handle overlaps. */
+ tregs->vector = 0;
+ tregs->format = 0;
+ tregs->pc = regs->pc;
+ tregs->sr = regs->sr;
+ }
+ return 0;
+
+give_sigsegv:
+ force_sigsegv(sig, current);
+ return err;
+}
+
+static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
+ sigset_t *set, struct pt_regs *regs)
+{
+ struct rt_sigframe __user *frame;
+ int fsize = frame_extra_sizes(regs->format);
+ int err = 0;
+
+ if (fsize < 0) {
+#ifdef DEBUG
+ printk ("setup_frame: Unknown frame format %#x\n",
+ regs->format);
+#endif
+ goto give_sigsegv;
+ }
+
+ frame = get_sigframe(ka, regs, sizeof(*frame));
+
+ if (fsize)
+ err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize);
+
+ err |= __put_user((current_thread_info()->exec_domain
+ && current_thread_info()->exec_domain->signal_invmap
+ && sig < 32
+ ? current_thread_info()->exec_domain->signal_invmap[sig]
+ : sig),
+ &frame->sig);
+ err |= __put_user(&frame->info, &frame->pinfo);
+ err |= __put_user(&frame->uc, &frame->puc);
+ err |= copy_siginfo_to_user(&frame->info, info);
+
+ /* Create the ucontext. */
+ err |= __put_user(0, &frame->uc.uc_flags);
+ err |= __put_user(NULL, &frame->uc.uc_link);
+ err |= __put_user((void __user *)current->sas_ss_sp,
+ &frame->uc.uc_stack.ss_sp);
+ err |= __put_user(sas_ss_flags(rdusp()),
+ &frame->uc.uc_stack.ss_flags);
+ err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
+ err |= rt_setup_ucontext(&frame->uc, regs);
+ err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
+
+ /* Set up to return from userspace. */
+#ifdef CONFIG_MMU
+ err |= __put_user(frame->retcode, &frame->pretcode);
+#ifdef __mcoldfire__
+ /* movel #__NR_rt_sigreturn,d0; trap #0 */
+ err |= __put_user(0x203c0000, (long __user *)(frame->retcode + 0));
+ err |= __put_user(0x00004e40 + (__NR_rt_sigreturn << 16),
+ (long __user *)(frame->retcode + 4));
+#else
+ /* moveq #,d0; notb d0; trap #0 */
+ err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16),
+ (long __user *)(frame->retcode + 0));
+ err |= __put_user(0x4e40, (short __user *)(frame->retcode + 4));
+#endif
+#else
+ err |= __put_user((void *) ret_from_user_rt_signal, &frame->pretcode);
+#endif /* CONFIG_MMU */
+
+ if (err)
+ goto give_sigsegv;
+
+ push_cache ((unsigned long) &frame->retcode);
+
+ /*
+ * Set up registers for signal handler. All the state we are about
+ * to destroy is successfully copied to sigframe.
+ */
+ wrusp ((unsigned long) frame);
+ regs->pc = (unsigned long) ka->sa.sa_handler;
+ adjustformat(regs);
+
+ /*
+ * This is subtle; if we build more than one sigframe, all but the
+ * first one will see frame format 0 and have fsize == 0, so we won't
+ * screw stkadj.
+ */
+ if (fsize)
+ regs->stkadj = fsize;
+
+ /* Prepare to skip over the extra stuff in the exception frame. */
+ if (regs->stkadj) {
+ struct pt_regs *tregs =
+ (struct pt_regs *)((ulong)regs + regs->stkadj);
+#ifdef DEBUG
+ printk("Performing stackadjust=%04x\n", regs->stkadj);
+#endif
+ /* This must be copied with decreasing addresses to
+ handle overlaps. */
+ tregs->vector = 0;
+ tregs->format = 0;
+ tregs->pc = regs->pc;
+ tregs->sr = regs->sr;
+ }
+ return 0;
+
+give_sigsegv:
+ force_sigsegv(sig, current);
+ return err;
+}
+
+static inline void
+handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
+{
+ switch (regs->d0) {
+ case -ERESTARTNOHAND:
+ if (!has_handler)
+ goto do_restart;
+ regs->d0 = -EINTR;
+ break;
+
+ case -ERESTART_RESTARTBLOCK:
+ if (!has_handler) {
+ regs->d0 = __NR_restart_syscall;
+ regs->pc -= 2;
+ break;
+ }
+ regs->d0 = -EINTR;
+ break;
+
+ case -ERESTARTSYS:
+ if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
+ regs->d0 = -EINTR;
+ break;
+ }
+ /* fallthrough */
+ case -ERESTARTNOINTR:
+ do_restart:
+ regs->d0 = regs->orig_d0;
+ regs->pc -= 2;
+ break;
+ }
+}
+
+/*
+ * OK, we're invoking a handler
+ */
+static void
+handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
+ sigset_t *oldset, struct pt_regs *regs)
+{
+ int err;
+ /* are we from a system call? */
+ if (regs->orig_d0 >= 0)
+ /* If so, check system call restarting.. */
+ handle_restart(regs, ka, 1);
+
+ /* set up the stack frame */
+ if (ka->sa.sa_flags & SA_SIGINFO)
+ err = setup_rt_frame(sig, ka, info, oldset, regs);
+ else
+ err = setup_frame(sig, ka, oldset, regs);
+
+ if (err)
+ return;
+
+ sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
+ if (!(ka->sa.sa_flags & SA_NODEFER))
+ sigaddset(&current->blocked,sig);
+ recalc_sigpending();
+
+ if (test_thread_flag(TIF_DELAYED_TRACE)) {
+ regs->sr &= ~0x8000;
+ send_sig(SIGTRAP, current, 1);
+ }
+
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+}
+
+/*
+ * Note that 'init' is a special process: it doesn't get signals it doesn't
+ * want to handle. Thus you cannot kill init even with a SIGKILL even by
+ * mistake.
+ */
+asmlinkage void do_signal(struct pt_regs *regs)
+{
+ siginfo_t info;
+ struct k_sigaction ka;
+ int signr;
+ sigset_t *oldset;
+
+ current->thread.esp0 = (unsigned long) regs;
+
+ if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ oldset = &current->saved_sigmask;
+ else
+ oldset = &current->blocked;
+
+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+ if (signr > 0) {
+ /* Whee! Actually deliver the signal. */
+ handle_signal(signr, &ka, &info, oldset, regs);
+ return;
+ }
+
+ /* Did we come from a system call? */
+ if (regs->orig_d0 >= 0)
+ /* Restart the system call - no handlers present */
+ handle_restart(regs, NULL, 0);
+
+ /* If there's no signal to deliver, we just restore the saved mask. */
+ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+ clear_thread_flag(TIF_RESTORE_SIGMASK);
+ sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
+ }
+}
diff --git a/arch/m68k/kernel/signal_mm.c b/arch/m68k/kernel/signal_mm.c
deleted file mode 100644
index cb856f9da655..000000000000
--- a/arch/m68k/kernel/signal_mm.c
+++ /dev/null
@@ -1,1115 +0,0 @@
-/*
- * linux/arch/m68k/kernel/signal.c
- *
- * Copyright (C) 1991, 1992 Linus Torvalds
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-/*
- * Linux/m68k support by Hamish Macdonald
- *
- * 68060 fixes by Jesper Skov
- *
- * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab
- *
- * mathemu support by Roman Zippel
- * (Note: fpstate in the signal context is completely ignored for the emulator
- * and the internal floating point format is put on stack)
- */
-
-/*
- * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
- * Atari :-) Current limitation: Only one sigstack can be active at one time.
- * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
- * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
- * signal handlers!
- */
-
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/signal.h>
-#include <linux/syscalls.h>
-#include <linux/errno.h>
-#include <linux/wait.h>
-#include <linux/ptrace.h>
-#include <linux/unistd.h>
-#include <linux/stddef.h>
-#include <linux/highuid.h>
-#include <linux/personality.h>
-#include <linux/tty.h>
-#include <linux/binfmts.h>
-#include <linux/module.h>
-
-#include <asm/setup.h>
-#include <asm/uaccess.h>
-#include <asm/pgtable.h>
-#include <asm/traps.h>
-#include <asm/ucontext.h>
-
-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-
-static const int frame_extra_sizes[16] = {
- [1] = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
- [2] = sizeof(((struct frame *)0)->un.fmt2),
- [3] = sizeof(((struct frame *)0)->un.fmt3),
-#ifdef CONFIG_COLDFIRE
- [4] = 0,
-#else
- [4] = sizeof(((struct frame *)0)->un.fmt4),
-#endif
- [5] = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
- [6] = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
- [7] = sizeof(((struct frame *)0)->un.fmt7),
- [8] = -1, /* sizeof(((struct frame *)0)->un.fmt8), */
- [9] = sizeof(((struct frame *)0)->un.fmt9),
- [10] = sizeof(((struct frame *)0)->un.fmta),
- [11] = sizeof(((struct frame *)0)->un.fmtb),
- [12] = -1, /* sizeof(((struct frame *)0)->un.fmtc), */
- [13] = -1, /* sizeof(((struct frame *)0)->un.fmtd), */
- [14] = -1, /* sizeof(((struct frame *)0)->un.fmte), */
- [15] = -1, /* sizeof(((struct frame *)0)->un.fmtf), */
-};
-
-int handle_kernel_fault(struct pt_regs *regs)
-{
- const struct exception_table_entry *fixup;
- struct pt_regs *tregs;
-
- /* Are we prepared to handle this kernel fault? */
- fixup = search_exception_tables(regs->pc);
- if (!fixup)
- return 0;
-
- /* Create a new four word stack frame, discarding the old one. */
- regs->stkadj = frame_extra_sizes[regs->format];
- tregs = (struct pt_regs *)((long)regs + regs->stkadj);
- tregs->vector = regs->vector;
-#ifdef CONFIG_COLDFIRE
- tregs->format = 4;
-#else
- tregs->format = 0;
-#endif
- tregs->pc = fixup->fixup;
- tregs->sr = regs->sr;
-
- return 1;
-}
-
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-asmlinkage int
-sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
-{
- mask &= _BLOCKABLE;
- spin_lock_irq(&current->sighand->siglock);
- current->saved_sigmask = current->blocked;
- siginitset(&current->blocked, mask);
- recalc_sigpending();
- spin_unlock_irq(&current->sighand->siglock);
-
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- set_restore_sigmask();
-
- return -ERESTARTNOHAND;
-}
-
-asmlinkage int
-sys_sigaction(int sig, const struct old_sigaction __user *act,
- struct old_sigaction __user *oact)
-{
- struct k_sigaction new_ka, old_ka;
- int ret;
-
- if (act) {
- old_sigset_t mask;
- if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
- __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
- __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
- __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
- __get_user(mask, &act->sa_mask))
- return -EFAULT;
- siginitset(&new_ka.sa.sa_mask, mask);
- }
-
- ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
-
- if (!ret && oact) {
- if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
- __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
- __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
- __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
- __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
- return -EFAULT;
- }
-
- return ret;
-}
-
-asmlinkage int
-sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
-{
- return do_sigaltstack(uss, uoss, rdusp());
-}
-
-
-/*
- * Do a signal return; undo the signal stack.
- *
- * Keep the return code on the stack quadword aligned!
- * That makes the cache flush below easier.
- */
-
-struct sigframe
-{
- char __user *pretcode;
- int sig;
- int code;
- struct sigcontext __user *psc;
- char retcode[8];
- unsigned long extramask[_NSIG_WORDS-1];
- struct sigcontext sc;
-};
-
-struct rt_sigframe
-{
- char __user *pretcode;
- int sig;
- struct siginfo __user *pinfo;
- void __user *puc;
- char retcode[8];
- struct siginfo info;
- struct ucontext uc;
-};
-
-
-static unsigned char fpu_version; /* version number of fpu, set by setup_frame */
-
-static inline int restore_fpu_state(struct sigcontext *sc)
-{
- int err = 1;
-
- if (FPU_IS_EMU) {
- /* restore registers */
- memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
- memcpy(current->thread.fp, sc->sc_fpregs, 24);
- return 0;
- }
-
- if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
- /* Verify the frame format. */
- if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
- (sc->sc_fpstate[0] != fpu_version))
- goto out;
- if (CPU_IS_020_OR_030) {
- if (m68k_fputype & FPU_68881 &&
- !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
- goto out;
- if (m68k_fputype & FPU_68882 &&
- !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
- goto out;
- } else if (CPU_IS_040) {
- if (!(sc->sc_fpstate[1] == 0x00 ||
- sc->sc_fpstate[1] == 0x28 ||
- sc->sc_fpstate[1] == 0x60))
- goto out;
- } else if (CPU_IS_060) {
- if (!(sc->sc_fpstate[3] == 0x00 ||
- sc->sc_fpstate[3] == 0x60 ||
- sc->sc_fpstate[3] == 0xe0))
- goto out;
- } else if (CPU_IS_COLDFIRE) {
- if (!(sc->sc_fpstate[0] == 0x00 ||
- sc->sc_fpstate[0] == 0x05 ||
- sc->sc_fpstate[0] == 0xe5))
- goto out;
- } else
- goto out;
-
- if (CPU_IS_COLDFIRE) {
- __asm__ volatile ("fmovemd %0,%%fp0-%%fp1\n\t"
- "fmovel %1,%%fpcr\n\t"
- "fmovel %2,%%fpsr\n\t"
- "fmovel %3,%%fpiar"
- : /* no outputs */
- : "m" (sc->sc_fpregs[0]),
- "m" (sc->sc_fpcntl[0]),
- "m" (sc->sc_fpcntl[1]),
- "m" (sc->sc_fpcntl[2]));
- } else {
- __asm__ volatile (".chip 68k/68881\n\t"
- "fmovemx %0,%%fp0-%%fp1\n\t"
- "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
- ".chip 68k"
- : /* no outputs */
- : "m" (*sc->sc_fpregs),
- "m" (*sc->sc_fpcntl));
- }
- }
-
- if (CPU_IS_COLDFIRE) {
- __asm__ volatile ("frestore %0" : : "m" (*sc->sc_fpstate));
- } else {
- __asm__ volatile (".chip 68k/68881\n\t"
- "frestore %0\n\t"
- ".chip 68k"
- : : "m" (*sc->sc_fpstate));
- }
- err = 0;
-
-out:
- return err;
-}
-
-#define FPCONTEXT_SIZE 216
-#define uc_fpstate uc_filler[0]
-#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
-#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
-
-static inline int rt_restore_fpu_state(struct ucontext __user *uc)
-{
- unsigned char fpstate[FPCONTEXT_SIZE];
- int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
- fpregset_t fpregs;
- int err = 1;
-
- if (FPU_IS_EMU) {
- /* restore fpu control register */
- if (__copy_from_user(current->thread.fpcntl,
- uc->uc_mcontext.fpregs.f_fpcntl, 12))
- goto out;
- /* restore all other fpu register */
- if (__copy_from_user(current->thread.fp,
- uc->uc_mcontext.fpregs.f_fpregs, 96))
- goto out;
- return 0;
- }
-
- if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
- goto out;
- if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
- if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
- context_size = fpstate[1];
- /* Verify the frame format. */
- if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
- (fpstate[0] != fpu_version))
- goto out;
- if (CPU_IS_020_OR_030) {
- if (m68k_fputype & FPU_68881 &&
- !(context_size == 0x18 || context_size == 0xb4))
- goto out;
- if (m68k_fputype & FPU_68882 &&
- !(context_size == 0x38 || context_size == 0xd4))
- goto out;
- } else if (CPU_IS_040) {
- if (!(context_size == 0x00 ||
- context_size == 0x28 ||
- context_size == 0x60))
- goto out;
- } else if (CPU_IS_060) {
- if (!(fpstate[3] == 0x00 ||
- fpstate[3] == 0x60 ||
- fpstate[3] == 0xe0))
- goto out;
- } else if (CPU_IS_COLDFIRE) {
- if (!(fpstate[3] == 0x00 ||
- fpstate[3] == 0x05 ||
- fpstate[3] == 0xe5))
- goto out;
- } else
- goto out;
- if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
- sizeof(fpregs)))
- goto out;
-
- if (CPU_IS_COLDFIRE) {
- __asm__ volatile ("fmovemd %0,%%fp0-%%fp7\n\t"
- "fmovel %1,%%fpcr\n\t"
- "fmovel %2,%%fpsr\n\t"
- "fmovel %3,%%fpiar"
- : /* no outputs */
- : "m" (fpregs.f_fpregs[0]),
- "m" (fpregs.f_fpcntl[0]),
- "m" (fpregs.f_fpcntl[1]),
- "m" (fpregs.f_fpcntl[2]));
- } else {
- __asm__ volatile (".chip 68k/68881\n\t"
- "fmovemx %0,%%fp0-%%fp7\n\t"
- "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
- ".chip 68k"
- : /* no outputs */
- : "m" (*fpregs.f_fpregs),
- "m" (*fpregs.f_fpcntl));
- }
- }
- if (context_size &&
- __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
- context_size))
- goto out;
-
- if (CPU_IS_COLDFIRE) {
- __asm__ volatile ("frestore %0" : : "m" (*fpstate));
- } else {
- __asm__ volatile (".chip 68k/68881\n\t"
- "frestore %0\n\t"
- ".chip 68k"
- : : "m" (*fpstate));
- }
- err = 0;
-
-out:
- return err;
-}
-
-static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
- void __user *fp)
-{
- int fsize = frame_extra_sizes[formatvec >> 12];
- if (fsize < 0) {
- /*
- * user process trying to return with weird frame format
- */
-#ifdef DEBUG
- printk("user process returning with weird frame format\n");
-#endif
- return 1;
- }
- if (!fsize) {
- regs->format = formatvec >> 12;
- regs->vector = formatvec & 0xfff;
- } else {
- struct switch_stack *sw = (struct switch_stack *)regs - 1;
- unsigned long buf[fsize / 2]; /* yes, twice as much */
-
- /* that'll make sure that expansion won't crap over data */
- if (copy_from_user(buf + fsize / 4, fp, fsize))
- return 1;
-
- /* point of no return */
- regs->format = formatvec >> 12;
- regs->vector = formatvec & 0xfff;
-#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
- __asm__ __volatile__ (
-#ifdef CONFIG_COLDFIRE
- " movel %0,%/sp\n\t"
- " bra ret_from_signal\n"
-#else
- " movel %0,%/a0\n\t"
- " subl %1,%/a0\n\t" /* make room on stack */
- " movel %/a0,%/sp\n\t" /* set stack pointer */
- /* move switch_stack and pt_regs */
- "1: movel %0@+,%/a0@+\n\t"
- " dbra %2,1b\n\t"
- " lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */
- " lsrl #2,%1\n\t"
- " subql #1,%1\n\t"
- /* copy to the gap we'd made */
- "2: movel %4@+,%/a0@+\n\t"
- " dbra %1,2b\n\t"
- " bral ret_from_signal\n"
-#endif
- : /* no outputs, it doesn't ever return */
- : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
- "n" (frame_offset), "a" (buf + fsize/4)
- : "a0");
-#undef frame_offset
- }
- return 0;
-}
-
-static inline int
-restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)
-{
- int formatvec;
- struct sigcontext context;
- int err;
-
- /* Always make any pending restarted system calls return -EINTR */
- current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
- /* get previous context */
- if (copy_from_user(&context, usc, sizeof(context)))
- goto badframe;
-
- /* restore passed registers */
- regs->d0 = context.sc_d0;
- regs->d1 = context.sc_d1;
- regs->a0 = context.sc_a0;
- regs->a1 = context.sc_a1;
- regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
- regs->pc = context.sc_pc;
- regs->orig_d0 = -1; /* disable syscall checks */
- wrusp(context.sc_usp);
- formatvec = context.sc_formatvec;
-
- err = restore_fpu_state(&context);
-
- if (err || mangle_kernel_stack(regs, formatvec, fp))
- goto badframe;
-
- return 0;
-
-badframe:
- return 1;
-}
-
-static inline int
-rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
- struct ucontext __user *uc)
-{
- int temp;
- greg_t __user *gregs = uc->uc_mcontext.gregs;
- unsigned long usp;
- int err;
-
- /* Always make any pending restarted system calls return -EINTR */
- current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
- err = __get_user(temp, &uc->uc_mcontext.version);
- if (temp != MCONTEXT_VERSION)
- goto badframe;
- /* restore passed registers */
- err |= __get_user(regs->d0, &gregs[0]);
- err |= __get_user(regs->d1, &gregs[1]);
- err |= __get_user(regs->d2, &gregs[2]);
- err |= __get_user(regs->d3, &gregs[3]);
- err |= __get_user(regs->d4, &gregs[4]);
- err |= __get_user(regs->d5, &gregs[5]);
- err |= __get_user(sw->d6, &gregs[6]);
- err |= __get_user(sw->d7, &gregs[7]);
- err |= __get_user(regs->a0, &gregs[8]);
- err |= __get_user(regs->a1, &gregs[9]);
- err |= __get_user(regs->a2, &gregs[10]);
- err |= __get_user(sw->a3, &gregs[11]);
- err |= __get_user(sw->a4, &gregs[12]);
- err |= __get_user(sw->a5, &gregs[13]);
- err |= __get_user(sw->a6, &gregs[14]);
- err |= __get_user(usp, &gregs[15]);
- wrusp(usp);
- err |= __get_user(regs->pc, &gregs[16]);
- err |= __get_user(temp, &gregs[17]);
- regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
- regs->orig_d0 = -1; /* disable syscall checks */
- err |= __get_user(temp, &uc->uc_formatvec);
-
- err |= rt_restore_fpu_state(uc);
-
- if (err || do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
- goto badframe;
-
- if (mangle_kernel_stack(regs, temp, &uc->uc_extra))
- goto badframe;
-
- return 0;
-
-badframe:
- return 1;
-}
-
-asmlinkage int do_sigreturn(unsigned long __unused)
-{
- struct switch_stack *sw = (struct switch_stack *) &__unused;
- struct pt_regs *regs = (struct pt_regs *) (sw + 1);
- unsigned long usp = rdusp();
- struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
- sigset_t set;
-
- if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
- goto badframe;
- if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
- (_NSIG_WORDS > 1 &&
- __copy_from_user(&set.sig[1], &frame->extramask,
- sizeof(frame->extramask))))
- goto badframe;
-
- sigdelsetmask(&set, ~_BLOCKABLE);
- current->blocked = set;
- recalc_sigpending();
-
- if (restore_sigcontext(regs, &frame->sc, frame + 1))
- goto badframe;
- return regs->d0;
-
-badframe:
- force_sig(SIGSEGV, current);
- return 0;
-}
-
-asmlinkage int do_rt_sigreturn(unsigned long __unused)
-{
- struct switch_stack *sw = (struct switch_stack *) &__unused;
- struct pt_regs *regs = (struct pt_regs *) (sw + 1);
- unsigned long usp = rdusp();
- struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
- sigset_t set;
-
- if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
- goto badframe;
- if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
- goto badframe;
-
- sigdelsetmask(&set, ~_BLOCKABLE);
- current->blocked = set;
- recalc_sigpending();
-
- if (rt_restore_ucontext(regs, sw, &frame->uc))
- goto badframe;
- return regs->d0;
-
-badframe:
- force_sig(SIGSEGV, current);
- return 0;
-}
-
-/*
- * Set up a signal frame.
- */
-
-static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
-{
- if (FPU_IS_EMU) {
- /* save registers */
- memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
- memcpy(sc->sc_fpregs, current->thread.fp, 24);
- return;
- }
-
- if (CPU_IS_COLDFIRE) {
- __asm__ volatile ("fsave %0"
- : : "m" (*sc->sc_fpstate) : "memory");
- } else {
- __asm__ volatile (".chip 68k/68881\n\t"
- "fsave %0\n\t"
- ".chip 68k"
- : : "m" (*sc->sc_fpstate) : "memory");
- }
-
- if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
- fpu_version = sc->sc_fpstate[0];
- if (CPU_IS_020_OR_030 &&
- regs->vector >= (VEC_FPBRUC * 4) &&
- regs->vector <= (VEC_FPNAN * 4)) {
- /* Clear pending exception in 68882 idle frame */
- if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
- sc->sc_fpstate[0x38] |= 1 << 3;
- }
-
- if (CPU_IS_COLDFIRE) {
- __asm__ volatile ("fmovemd %%fp0-%%fp1,%0\n\t"
- "fmovel %%fpcr,%1\n\t"
- "fmovel %%fpsr,%2\n\t"
- "fmovel %%fpiar,%3"
- : "=m" (sc->sc_fpregs[0]),
- "=m" (sc->sc_fpcntl[0]),
- "=m" (sc->sc_fpcntl[1]),
- "=m" (sc->sc_fpcntl[2])
- : /* no inputs */
- : "memory");
- } else {
- __asm__ volatile (".chip 68k/68881\n\t"
- "fmovemx %%fp0-%%fp1,%0\n\t"
- "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
- ".chip 68k"
- : "=m" (*sc->sc_fpregs),
- "=m" (*sc->sc_fpcntl)
- : /* no inputs */
- : "memory");
- }
- }
-}
-
-static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
-{
- unsigned char fpstate[FPCONTEXT_SIZE];
- int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
- int err = 0;
-
- if (FPU_IS_EMU) {
- /* save fpu control register */
- err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
- current->thread.fpcntl, 12);
- /* save all other fpu register */
- err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
- current->thread.fp, 96);
- return err;
- }
-
- if (CPU_IS_COLDFIRE) {
- __asm__ volatile ("fsave %0" : : "m" (*fpstate) : "memory");
- } else {
- __asm__ volatile (".chip 68k/68881\n\t"
- "fsave %0\n\t"
- ".chip 68k"
- : : "m" (*fpstate) : "memory");
- }
-
- err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
- if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
- fpregset_t fpregs;
- if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
- context_size = fpstate[1];
- fpu_version = fpstate[0];
- if (CPU_IS_020_OR_030 &&
- regs->vector >= (VEC_FPBRUC * 4) &&
- regs->vector <= (VEC_FPNAN * 4)) {
- /* Clear pending exception in 68882 idle frame */
- if (*(unsigned short *) fpstate == 0x1f38)
- fpstate[0x38] |= 1 << 3;
- }
- if (CPU_IS_COLDFIRE) {
- __asm__ volatile ("fmovemd %%fp0-%%fp7,%0\n\t"
- "fmovel %%fpcr,%1\n\t"
- "fmovel %%fpsr,%2\n\t"
- "fmovel %%fpiar,%3"
- : "=m" (fpregs.f_fpregs[0]),
- "=m" (fpregs.f_fpcntl[0]),
- "=m" (fpregs.f_fpcntl[1]),
- "=m" (fpregs.f_fpcntl[2])
- : /* no inputs */
- : "memory");
- } else {
- __asm__ volatile (".chip 68k/68881\n\t"
- "fmovemx %%fp0-%%fp7,%0\n\t"
- "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
- ".chip 68k"
- : "=m" (*fpregs.f_fpregs),
- "=m" (*fpregs.f_fpcntl)
- : /* no inputs */
- : "memory");
- }
- err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
- sizeof(fpregs));
- }
- if (context_size)
- err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
- context_size);
- return err;
-}
-
-static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
- unsigned long mask)
-{
- sc->sc_mask = mask;
- sc->sc_usp = rdusp();
- sc->sc_d0 = regs->d0;
- sc->sc_d1 = regs->d1;
- sc->sc_a0 = regs->a0;
- sc->sc_a1 = regs->a1;
- sc->sc_sr = regs->sr;
- sc->sc_pc = regs->pc;
- sc->sc_formatvec = regs->format << 12 | regs->vector;
- save_fpu_state(sc, regs);
-}
-
-static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
-{
- struct switch_stack *sw = (struct switch_stack *)regs - 1;
- greg_t __user *gregs = uc->uc_mcontext.gregs;
- int err = 0;
-
- err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
- err |= __put_user(regs->d0, &gregs[0]);
- err |= __put_user(regs->d1, &gregs[1]);
- err |= __put_user(regs->d2, &gregs[2]);
- err |= __put_user(regs->d3, &gregs[3]);
- err |= __put_user(regs->d4, &gregs[4]);
- err |= __put_user(regs->d5, &gregs[5]);
- err |= __put_user(sw->d6, &gregs[6]);
- err |= __put_user(sw->d7, &gregs[7]);
- err |= __put_user(regs->a0, &gregs[8]);
- err |= __put_user(regs->a1, &gregs[9]);
- err |= __put_user(regs->a2, &gregs[10]);
- err |= __put_user(sw->a3, &gregs[11]);
- err |= __put_user(sw->a4, &gregs[12]);
- err |= __put_user(sw->a5, &gregs[13]);
- err |= __put_user(sw->a6, &gregs[14]);
- err |= __put_user(rdusp(), &gregs[15]);
- err |= __put_user(regs->pc, &gregs[16]);
- err |= __put_user(regs->sr, &gregs[17]);
- err |= __put_user((regs->format << 12) | regs->vector, &uc->uc_formatvec);
- err |= rt_save_fpu_state(uc, regs);
- return err;
-}
-
-static inline void push_cache (unsigned long vaddr)
-{
- /*
- * Using the old cache_push_v() was really a big waste.
- *
- * What we are trying to do is to flush 8 bytes to ram.
- * Flushing 2 cache lines of 16 bytes is much cheaper than
- * flushing 1 or 2 pages, as previously done in
- * cache_push_v().
- * Jes
- */
- if (CPU_IS_040) {
- unsigned long temp;
-
- __asm__ __volatile__ (".chip 68040\n\t"
- "nop\n\t"
- "ptestr (%1)\n\t"
- "movec %%mmusr,%0\n\t"
- ".chip 68k"
- : "=r" (temp)
- : "a" (vaddr));
-
- temp &= PAGE_MASK;
- temp |= vaddr & ~PAGE_MASK;
-
- __asm__ __volatile__ (".chip 68040\n\t"
- "nop\n\t"
- "cpushl %%bc,(%0)\n\t"
- ".chip 68k"
- : : "a" (temp));
- }
- else if (CPU_IS_060) {
- unsigned long temp;
- __asm__ __volatile__ (".chip 68060\n\t"
- "plpar (%0)\n\t"
- ".chip 68k"
- : "=a" (temp)
- : "0" (vaddr));
- __asm__ __volatile__ (".chip 68060\n\t"
- "cpushl %%bc,(%0)\n\t"
- ".chip 68k"
- : : "a" (temp));
- } else if (!CPU_IS_COLDFIRE) {
- /*
- * 68030/68020 have no writeback cache;
- * still need to clear icache.
- * Note that vaddr is guaranteed to be long word aligned.
- */
- unsigned long temp;
- asm volatile ("movec %%cacr,%0" : "=r" (temp));
- temp += 4;
- asm volatile ("movec %0,%%caar\n\t"
- "movec %1,%%cacr"
- : : "r" (vaddr), "r" (temp));
- asm volatile ("movec %0,%%caar\n\t"
- "movec %1,%%cacr"
- : : "r" (vaddr + 4), "r" (temp));
- }
-}
-
-static inline void __user *
-get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
-{
- unsigned long usp;
-
- /* Default to using normal stack. */
- usp = rdusp();
-
- /* This is the X/Open sanctioned signal stack switching. */
- if (ka->sa.sa_flags & SA_ONSTACK) {
- if (!sas_ss_flags(usp))
- usp = current->sas_ss_sp + current->sas_ss_size;
- }
- return (void __user *)((usp - frame_size) & -8UL);
-}
-
-static int setup_frame (int sig, struct k_sigaction *ka,
- sigset_t *set, struct pt_regs *regs)
-{
- struct sigframe __user *frame;
- int fsize = frame_extra_sizes[regs->format];
- struct sigcontext context;
- int err = 0;
-
- if (fsize < 0) {
-#ifdef DEBUG
- printk ("setup_frame: Unknown frame format %#x\n",
- regs->format);
-#endif
- goto give_sigsegv;
- }
-
- frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);
-
- if (fsize)
- err |= copy_to_user (frame + 1, regs + 1, fsize);
-
- err |= __put_user((current_thread_info()->exec_domain
- && current_thread_info()->exec_domain->signal_invmap
- && sig < 32
- ? current_thread_info()->exec_domain->signal_invmap[sig]
- : sig),
- &frame->sig);
-
- err |= __put_user(regs->vector, &frame->code);
- err |= __put_user(&frame->sc, &frame->psc);
-
- if (_NSIG_WORDS > 1)
- err |= copy_to_user(frame->extramask, &set->sig[1],
- sizeof(frame->extramask));
-
- setup_sigcontext(&context, regs, set->sig[0]);
- err |= copy_to_user (&frame->sc, &context, sizeof(context));
-
- /* Set up to return from userspace. */
- err |= __put_user(frame->retcode, &frame->pretcode);
- /* moveq #,d0; trap #0 */
- err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
- (long __user *)(frame->retcode));
-
- if (err)
- goto give_sigsegv;
-
- push_cache ((unsigned long) &frame->retcode);
-
- /*
- * Set up registers for signal handler. All the state we are about
- * to destroy is successfully copied to sigframe.
- */
- wrusp ((unsigned long) frame);
- regs->pc = (unsigned long) ka->sa.sa_handler;
-
- /*
- * This is subtle; if we build more than one sigframe, all but the
- * first one will see frame format 0 and have fsize == 0, so we won't
- * screw stkadj.
- */
- if (fsize)
- regs->stkadj = fsize;
-
- /* Prepare to skip over the extra stuff in the exception frame. */
- if (regs->stkadj) {
- struct pt_regs *tregs =
- (struct pt_regs *)((ulong)regs + regs->stkadj);
-#ifdef DEBUG
- printk("Performing stackadjust=%04x\n", regs->stkadj);
-#endif
- /* This must be copied with decreasing addresses to
- handle overlaps. */
- tregs->vector = 0;
- tregs->format = 0;
- tregs->pc = regs->pc;
- tregs->sr = regs->sr;
- }
- return 0;
-
-give_sigsegv:
- force_sigsegv(sig, current);
- return err;
-}
-
-static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
- sigset_t *set, struct pt_regs *regs)
-{
- struct rt_sigframe __user *frame;
- int fsize = frame_extra_sizes[regs->format];
- int err = 0;
-
- if (fsize < 0) {
-#ifdef DEBUG
- printk ("setup_frame: Unknown frame format %#x\n",
- regs->format);
-#endif
- goto give_sigsegv;
- }
-
- frame = get_sigframe(ka, regs, sizeof(*frame));
-
- if (fsize)
- err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize);
-
- err |= __put_user((current_thread_info()->exec_domain
- && current_thread_info()->exec_domain->signal_invmap
- && sig < 32
- ? current_thread_info()->exec_domain->signal_invmap[sig]
- : sig),
- &frame->sig);
- err |= __put_user(&frame->info, &frame->pinfo);
- err |= __put_user(&frame->uc, &frame->puc);
- err |= copy_siginfo_to_user(&frame->info, info);
-
- /* Create the ucontext. */
- err |= __put_user(0, &frame->uc.uc_flags);
- err |= __put_user(NULL, &frame->uc.uc_link);
- err |= __put_user((void __user *)current->sas_ss_sp,
- &frame->uc.uc_stack.ss_sp);
- err |= __put_user(sas_ss_flags(rdusp()),
- &frame->uc.uc_stack.ss_flags);
- err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
- err |= rt_setup_ucontext(&frame->uc, regs);
- err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
-
- /* Set up to return from userspace. */
- err |= __put_user(frame->retcode, &frame->pretcode);
-#ifdef __mcoldfire__
- /* movel #__NR_rt_sigreturn,d0; trap #0 */
- err |= __put_user(0x203c0000, (long __user *)(frame->retcode + 0));
- err |= __put_user(0x00004e40 + (__NR_rt_sigreturn << 16),
- (long __user *)(frame->retcode + 4));
-#else
- /* moveq #,d0; notb d0; trap #0 */
- err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16),
- (long __user *)(frame->retcode + 0));
- err |= __put_user(0x4e40, (short __user *)(frame->retcode + 4));
-#endif
-
- if (err)
- goto give_sigsegv;
-
- push_cache ((unsigned long) &frame->retcode);
-
- /*
- * Set up registers for signal handler. All the state we are about
- * to destroy is successfully copied to sigframe.
- */
- wrusp ((unsigned long) frame);
- regs->pc = (unsigned long) ka->sa.sa_handler;
-
- /*
- * This is subtle; if we build more than one sigframe, all but the
- * first one will see frame format 0 and have fsize == 0, so we won't
- * screw stkadj.
- */
- if (fsize)
- regs->stkadj = fsize;
-
- /* Prepare to skip over the extra stuff in the exception frame. */
- if (regs->stkadj) {
- struct pt_regs *tregs =
- (struct pt_regs *)((ulong)regs + regs->stkadj);
-#ifdef DEBUG
- printk("Performing stackadjust=%04x\n", regs->stkadj);
-#endif
- /* This must be copied with decreasing addresses to
- handle overlaps. */
- tregs->vector = 0;
- tregs->format = 0;
- tregs->pc = regs->pc;
- tregs->sr = regs->sr;
- }
- return 0;
-
-give_sigsegv:
- force_sigsegv(sig, current);
- return err;
-}
-
-static inline void
-handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
-{
- switch (regs->d0) {
- case -ERESTARTNOHAND:
- if (!has_handler)
- goto do_restart;
- regs->d0 = -EINTR;
- break;
-
- case -ERESTART_RESTARTBLOCK:
- if (!has_handler) {
- regs->d0 = __NR_restart_syscall;
- regs->pc -= 2;
- break;
- }
- regs->d0 = -EINTR;
- break;
-
- case -ERESTARTSYS:
- if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
- regs->d0 = -EINTR;
- break;
- }
- /* fallthrough */
- case -ERESTARTNOINTR:
- do_restart:
- regs->d0 = regs->orig_d0;
- regs->pc -= 2;
- break;
- }
-}
-
-void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
-{
- if (regs->orig_d0 < 0)
- return;
- switch (regs->d0) {
- case -ERESTARTNOHAND:
- case -ERESTARTSYS:
- case -ERESTARTNOINTR:
- regs->d0 = regs->orig_d0;
- regs->orig_d0 = -1;
- regs->pc -= 2;
- break;
- }
-}
-
-/*
- * OK, we're invoking a handler
- */
-static void
-handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
- sigset_t *oldset, struct pt_regs *regs)
-{
- int err;
- /* are we from a system call? */
- if (regs->orig_d0 >= 0)
- /* If so, check system call restarting.. */
- handle_restart(regs, ka, 1);
-
- /* set up the stack frame */
- if (ka->sa.sa_flags & SA_SIGINFO)
- err = setup_rt_frame(sig, ka, info, oldset, regs);
- else
- err = setup_frame(sig, ka, oldset, regs);
-
- if (err)
- return;
-
- sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
- if (!(ka->sa.sa_flags & SA_NODEFER))
- sigaddset(&current->blocked,sig);
- recalc_sigpending();
-
- if (test_thread_flag(TIF_DELAYED_TRACE)) {
- regs->sr &= ~0x8000;
- send_sig(SIGTRAP, current, 1);
- }
-
- clear_thread_flag(TIF_RESTORE_SIGMASK);
-}
-
-/*
- * Note that 'init' is a special process: it doesn't get signals it doesn't
- * want to handle. Thus you cannot kill init even with a SIGKILL even by
- * mistake.
- */
-asmlinkage void do_signal(struct pt_regs *regs)
-{
- siginfo_t info;
- struct k_sigaction ka;
- int signr;
- sigset_t *oldset;
-
- current->thread.esp0 = (unsigned long) regs;
-
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
- oldset = &current->saved_sigmask;
- else
- oldset = &current->blocked;
-
- signr = get_signal_to_deliver(&info, &ka, regs, NULL);
- if (signr > 0) {
- /* Whee! Actually deliver the signal. */
- handle_signal(signr, &ka, &info, oldset, regs);
- return;
- }
-
- /* Did we come from a system call? */
- if (regs->orig_d0 >= 0)
- /* Restart the system call - no handlers present */
- handle_restart(regs, NULL, 0);
-
- /* If there's no signal to deliver, we just restore the saved mask. */
- if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
- clear_thread_flag(TIF_RESTORE_SIGMASK);
- sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
- }
-}
diff --git a/arch/m68k/kernel/signal_no.c b/arch/m68k/kernel/signal_no.c
deleted file mode 100644
index 36a81bb6835a..000000000000
--- a/arch/m68k/kernel/signal_no.c
+++ /dev/null
@@ -1,765 +0,0 @@
-/*
- * linux/arch/m68knommu/kernel/signal.c
- *
- * Copyright (C) 1991, 1992 Linus Torvalds
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-/*
- * Linux/m68k support by Hamish Macdonald
- *
- * 68060 fixes by Jesper Skov
- *
- * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab
- *
- * mathemu support by Roman Zippel
- * (Note: fpstate in the signal context is completely ignored for the emulator
- * and the internal floating point format is put on stack)
- */
-
-/*
- * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
- * Atari :-) Current limitation: Only one sigstack can be active at one time.
- * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
- * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
- * signal handlers!
- */
-
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/signal.h>
-#include <linux/syscalls.h>
-#include <linux/errno.h>
-#include <linux/wait.h>
-#include <linux/ptrace.h>
-#include <linux/unistd.h>
-#include <linux/stddef.h>
-#include <linux/highuid.h>
-#include <linux/tty.h>
-#include <linux/personality.h>
-#include <linux/binfmts.h>
-
-#include <asm/setup.h>
-#include <asm/uaccess.h>
-#include <asm/pgtable.h>
-#include <asm/traps.h>
-#include <asm/ucontext.h>
-
-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-
-void ret_from_user_signal(void);
-void ret_from_user_rt_signal(void);
-
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-asmlinkage int
-sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
-{
- mask &= _BLOCKABLE;
- spin_lock_irq(&current->sighand->siglock);
- current->saved_sigmask = current->blocked;
- siginitset(&current->blocked, mask);
- recalc_sigpending();
- spin_unlock_irq(&current->sighand->siglock);
-
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- set_restore_sigmask();
-
- return -ERESTARTNOHAND;
-}
-
-asmlinkage int
-sys_sigaction(int sig, const struct old_sigaction __user *act,
- struct old_sigaction __user *oact)
-{
- struct k_sigaction new_ka, old_ka;
- int ret;
-
- if (act) {
- old_sigset_t mask;
- if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
- __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
- __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
- __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
- __get_user(mask, &act->sa_mask))
- return -EFAULT;
- siginitset(&new_ka.sa.sa_mask, mask);
- }
-
- ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
-
- if (!ret && oact) {
- if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
- __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
- __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
- __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
- __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
- return -EFAULT;
- }
-
- return ret;
-}
-
-asmlinkage int
-sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
-{
- return do_sigaltstack(uss, uoss, rdusp());
-}
-
-
-/*
- * Do a signal return; undo the signal stack.
- *
- * Keep the return code on the stack quadword aligned!
- * That makes the cache flush below easier.
- */
-
-struct sigframe
-{
- char __user *pretcode;
- int sig;
- int code;
- struct sigcontext __user *psc;
- char retcode[8];
- unsigned long extramask[_NSIG_WORDS-1];
- struct sigcontext sc;
-};
-
-struct rt_sigframe
-{
- char __user *pretcode;
- int sig;
- struct siginfo __user *pinfo;
- void __user *puc;
- char retcode[8];
- struct siginfo info;
- struct ucontext uc;
-};
-
-#ifdef CONFIG_FPU
-
-static unsigned char fpu_version = 0; /* version number of fpu, set by setup_frame */
-
-static inline int restore_fpu_state(struct sigcontext *sc)
-{
- int err = 1;
-
- if (FPU_IS_EMU) {
- /* restore registers */
- memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
- memcpy(current->thread.fp, sc->sc_fpregs, 24);
- return 0;
- }
-
- if (sc->sc_fpstate[0]) {
- /* Verify the frame format. */
- if (sc->sc_fpstate[0] != fpu_version)
- goto out;
-
- __asm__ volatile (".chip 68k/68881\n\t"
- "fmovemx %0,%%fp0-%%fp1\n\t"
- "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
- ".chip 68k"
- : /* no outputs */
- : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
- }
- __asm__ volatile (".chip 68k/68881\n\t"
- "frestore %0\n\t"
- ".chip 68k" : : "m" (*sc->sc_fpstate));
- err = 0;
-
-out:
- return err;
-}
-
-#define FPCONTEXT_SIZE 216
-#define uc_fpstate uc_filler[0]
-#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
-#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
-
-static inline int rt_restore_fpu_state(struct ucontext __user *uc)
-{
- unsigned char fpstate[FPCONTEXT_SIZE];
- int context_size = 0;
- fpregset_t fpregs;
- int err = 1;
-
- if (FPU_IS_EMU) {
- /* restore fpu control register */
- if (__copy_from_user(current->thread.fpcntl,
- uc->uc_mcontext.fpregs.f_fpcntl, 12))
- goto out;
- /* restore all other fpu register */
- if (__copy_from_user(current->thread.fp,
- uc->uc_mcontext.fpregs.f_fpregs, 96))
- goto out;
- return 0;
- }
-
- if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
- goto out;
- if (fpstate[0]) {
- context_size = fpstate[1];
-
- /* Verify the frame format. */
- if (fpstate[0] != fpu_version)
- goto out;
- if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
- sizeof(fpregs)))
- goto out;
- __asm__ volatile (".chip 68k/68881\n\t"
- "fmovemx %0,%%fp0-%%fp7\n\t"
- "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
- ".chip 68k"
- : /* no outputs */
- : "m" (*fpregs.f_fpregs),
- "m" (*fpregs.f_fpcntl));
- }
- if (context_size &&
- __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
- context_size))
- goto out;
- __asm__ volatile (".chip 68k/68881\n\t"
- "frestore %0\n\t"
- ".chip 68k" : : "m" (*fpstate));
- err = 0;
-
-out:
- return err;
-}
-
-#endif
-
-static inline int
-restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp,
- int *pd0)
-{
- int formatvec;
- struct sigcontext context;
- int err = 0;
-
- /* Always make any pending restarted system calls return -EINTR */
- current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
- /* get previous context */
- if (copy_from_user(&context, usc, sizeof(context)))
- goto badframe;
-
- /* restore passed registers */
- regs->d1 = context.sc_d1;
- regs->a0 = context.sc_a0;
- regs->a1 = context.sc_a1;
- ((struct switch_stack *)regs - 1)->a5 = context.sc_a5;
- regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
- regs->pc = context.sc_pc;
- regs->orig_d0 = -1; /* disable syscall checks */
- wrusp(context.sc_usp);
- formatvec = context.sc_formatvec;
- regs->format = formatvec >> 12;
- regs->vector = formatvec & 0xfff;
-
-#ifdef CONFIG_FPU
- err = restore_fpu_state(&context);
-#endif
-
- *pd0 = context.sc_d0;
- return err;
-
-badframe:
- return 1;
-}
-
-static inline int
-rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
- struct ucontext __user *uc, int *pd0)
-{
- int temp;
- greg_t __user *gregs = uc->uc_mcontext.gregs;
- unsigned long usp;
- int err;
-
- /* Always make any pending restarted system calls return -EINTR */
- current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
- err = __get_user(temp, &uc->uc_mcontext.version);
- if (temp != MCONTEXT_VERSION)
- goto badframe;
- /* restore passed registers */
- err |= __get_user(regs->d0, &gregs[0]);
- err |= __get_user(regs->d1, &gregs[1]);
- err |= __get_user(regs->d2, &gregs[2]);
- err |= __get_user(regs->d3, &gregs[3]);
- err |= __get_user(regs->d4, &gregs[4]);
- err |= __get_user(regs->d5, &gregs[5]);
- err |= __get_user(sw->d6, &gregs[6]);
- err |= __get_user(sw->d7, &gregs[7]);
- err |= __get_user(regs->a0, &gregs[8]);
- err |= __get_user(regs->a1, &gregs[9]);
- err |= __get_user(regs->a2, &gregs[10]);
- err |= __get_user(sw->a3, &gregs[11]);
- err |= __get_user(sw->a4, &gregs[12]);
- err |= __get_user(sw->a5, &gregs[13]);
- err |= __get_user(sw->a6, &gregs[14]);
- err |= __get_user(usp, &gregs[15]);
- wrusp(usp);
- err |= __get_user(regs->pc, &gregs[16]);
- err |= __get_user(temp, &gregs[17]);
- regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
- regs->orig_d0 = -1; /* disable syscall checks */
- regs->format = temp >> 12;
- regs->vector = temp & 0xfff;
-
- if (do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
- goto badframe;
-
- *pd0 = regs->d0;
- return err;
-
-badframe:
- return 1;
-}
-
-asmlinkage int do_sigreturn(unsigned long __unused)
-{
- struct switch_stack *sw = (struct switch_stack *) &__unused;
- struct pt_regs *regs = (struct pt_regs *) (sw + 1);
- unsigned long usp = rdusp();
- struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
- sigset_t set;
- int d0;
-
- if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
- goto badframe;
- if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
- (_NSIG_WORDS > 1 &&
- __copy_from_user(&set.sig[1], &frame->extramask,
- sizeof(frame->extramask))))
- goto badframe;
-
- sigdelsetmask(&set, ~_BLOCKABLE);
- spin_lock_irq(&current->sighand->siglock);
- current->blocked = set;
- recalc_sigpending();
- spin_unlock_irq(&current->sighand->siglock);
-
- if (restore_sigcontext(regs, &frame->sc, frame + 1, &d0))
- goto badframe;
- return d0;
-
-badframe:
- force_sig(SIGSEGV, current);
- return 0;
-}
-
-asmlinkage int do_rt_sigreturn(unsigned long __unused)
-{
- struct switch_stack *sw = (struct switch_stack *) &__unused;
- struct pt_regs *regs = (struct pt_regs *) (sw + 1);
- unsigned long usp = rdusp();
- struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
- sigset_t set;
- int d0;
-
- if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
- goto badframe;
- if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
- goto badframe;
-
- sigdelsetmask(&set, ~_BLOCKABLE);
- spin_lock_irq(&current->sighand->siglock);
- current->blocked = set;
- recalc_sigpending();
- spin_unlock_irq(&current->sighand->siglock);
-
- if (rt_restore_ucontext(regs, sw, &frame->uc, &d0))
- goto badframe;
- return d0;
-
-badframe:
- force_sig(SIGSEGV, current);
- return 0;
-}
-
-#ifdef CONFIG_FPU
-/*
- * Set up a signal frame.
- */
-
-static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
-{
- if (FPU_IS_EMU) {
- /* save registers */
- memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
- memcpy(sc->sc_fpregs, current->thread.fp, 24);
- return;
- }
-
- __asm__ volatile (".chip 68k/68881\n\t"
- "fsave %0\n\t"
- ".chip 68k"
- : : "m" (*sc->sc_fpstate) : "memory");
-
- if (sc->sc_fpstate[0]) {
- fpu_version = sc->sc_fpstate[0];
- __asm__ volatile (".chip 68k/68881\n\t"
- "fmovemx %%fp0-%%fp1,%0\n\t"
- "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
- ".chip 68k"
- : "=m" (*sc->sc_fpregs),
- "=m" (*sc->sc_fpcntl)
- : /* no inputs */
- : "memory");
- }
-}
-
-static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
-{
- unsigned char fpstate[FPCONTEXT_SIZE];
- int context_size = 0;
- int err = 0;
-
- if (FPU_IS_EMU) {
- /* save fpu control register */
- err |= copy_to_user(uc->uc_mcontext.fpregs.f_pcntl,
- current->thread.fpcntl, 12);
- /* save all other fpu register */
- err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
- current->thread.fp, 96);
- return err;
- }
-
- __asm__ volatile (".chip 68k/68881\n\t"
- "fsave %0\n\t"
- ".chip 68k"
- : : "m" (*fpstate) : "memory");
-
- err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
- if (fpstate[0]) {
- fpregset_t fpregs;
- context_size = fpstate[1];
- fpu_version = fpstate[0];
- __asm__ volatile (".chip 68k/68881\n\t"
- "fmovemx %%fp0-%%fp7,%0\n\t"
- "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
- ".chip 68k"
- : "=m" (*fpregs.f_fpregs),
- "=m" (*fpregs.f_fpcntl)
- : /* no inputs */
- : "memory");
- err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
- sizeof(fpregs));
- }
- if (context_size)
- err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
- context_size);
- return err;
-}
-
-#endif
-
-static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
- unsigned long mask)
-{
- sc->sc_mask = mask;
- sc->sc_usp = rdusp();
- sc->sc_d0 = regs->d0;
- sc->sc_d1 = regs->d1;
- sc->sc_a0 = regs->a0;
- sc->sc_a1 = regs->a1;
- sc->sc_a5 = ((struct switch_stack *)regs - 1)->a5;
- sc->sc_sr = regs->sr;
- sc->sc_pc = regs->pc;
- sc->sc_formatvec = regs->format << 12 | regs->vector;
-#ifdef CONFIG_FPU
- save_fpu_state(sc, regs);
-#endif
-}
-
-static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
-{
- struct switch_stack *sw = (struct switch_stack *)regs - 1;
- greg_t __user *gregs = uc->uc_mcontext.gregs;
- int err = 0;
-
- err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
- err |= __put_user(regs->d0, &gregs[0]);
- err |= __put_user(regs->d1, &gregs[1]);
- err |= __put_user(regs->d2, &gregs[2]);
- err |= __put_user(regs->d3, &gregs[3]);
- err |= __put_user(regs->d4, &gregs[4]);
- err |= __put_user(regs->d5, &gregs[5]);
- err |= __put_user(sw->d6, &gregs[6]);
- err |= __put_user(sw->d7, &gregs[7]);
- err |= __put_user(regs->a0, &gregs[8]);
- err |= __put_user(regs->a1, &gregs[9]);
- err |= __put_user(regs->a2, &gregs[10]);
- err |= __put_user(sw->a3, &gregs[11]);
- err |= __put_user(sw->a4, &gregs[12]);
- err |= __put_user(sw->a5, &gregs[13]);
- err |= __put_user(sw->a6, &gregs[14]);
- err |= __put_user(rdusp(), &gregs[15]);
- err |= __put_user(regs->pc, &gregs[16]);
- err |= __put_user(regs->sr, &gregs[17]);
-#ifdef CONFIG_FPU
- err |= rt_save_fpu_state(uc, regs);
-#endif
- return err;
-}
-
-static inline void __user *
-get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
-{
- unsigned long usp;
-
- /* Default to using normal stack. */
- usp = rdusp();
-
- /* This is the X/Open sanctioned signal stack switching. */
- if (ka->sa.sa_flags & SA_ONSTACK) {
- if (!sas_ss_flags(usp))
- usp = current->sas_ss_sp + current->sas_ss_size;
- }
- return (void __user *)((usp - frame_size) & -8UL);
-}
-
-static int setup_frame (int sig, struct k_sigaction *ka,
- sigset_t *set, struct pt_regs *regs)
-{
- struct sigframe __user *frame;
- struct sigcontext context;
- int err = 0;
-
- frame = get_sigframe(ka, regs, sizeof(*frame));
-
- err |= __put_user((current_thread_info()->exec_domain
- && current_thread_info()->exec_domain->signal_invmap
- && sig < 32
- ? current_thread_info()->exec_domain->signal_invmap[sig]
- : sig),
- &frame->sig);
-
- err |= __put_user(regs->vector, &frame->code);
- err |= __put_user(&frame->sc, &frame->psc);
-
- if (_NSIG_WORDS > 1)
- err |= copy_to_user(frame->extramask, &set->sig[1],
- sizeof(frame->extramask));
-
- setup_sigcontext(&context, regs, set->sig[0]);
- err |= copy_to_user (&frame->sc, &context, sizeof(context));
-
- /* Set up to return from userspace. */
- err |= __put_user((void *) ret_from_user_signal, &frame->pretcode);
-
- if (err)
- goto give_sigsegv;
-
- /* Set up registers for signal handler */
- wrusp ((unsigned long) frame);
- regs->pc = (unsigned long) ka->sa.sa_handler;
- ((struct switch_stack *)regs - 1)->a5 = current->mm->start_data;
- regs->format = 0x4; /*set format byte to make stack appear modulo 4
- which it will be when doing the rte */
-
-adjust_stack:
- /* Prepare to skip over the extra stuff in the exception frame. */
- if (regs->stkadj) {
- struct pt_regs *tregs =
- (struct pt_regs *)((ulong)regs + regs->stkadj);
-#if defined(DEBUG)
- printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs->stkadj);
-#endif
- /* This must be copied with decreasing addresses to
- handle overlaps. */
- tregs->vector = 0;
- tregs->format = 0;
- tregs->pc = regs->pc;
- tregs->sr = regs->sr;
- }
- return err;
-
-give_sigsegv:
- force_sigsegv(sig, current);
- goto adjust_stack;
-}
-
-static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
- sigset_t *set, struct pt_regs *regs)
-{
- struct rt_sigframe __user *frame;
- int err = 0;
-
- frame = get_sigframe(ka, regs, sizeof(*frame));
-
- err |= __put_user((current_thread_info()->exec_domain
- && current_thread_info()->exec_domain->signal_invmap
- && sig < 32
- ? current_thread_info()->exec_domain->signal_invmap[sig]
- : sig),
- &frame->sig);
- err |= __put_user(&frame->info, &frame->pinfo);
- err |= __put_user(&frame->uc, &frame->puc);
- err |= copy_siginfo_to_user(&frame->info, info);
-
- /* Create the ucontext. */
- err |= __put_user(0, &frame->uc.uc_flags);
- err |= __put_user(NULL, &frame->uc.uc_link);
- err |= __put_user((void __user *)current->sas_ss_sp,
- &frame->uc.uc_stack.ss_sp);
- err |= __put_user(sas_ss_flags(rdusp()),
- &frame->uc.uc_stack.ss_flags);
- err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
- err |= rt_setup_ucontext(&frame->uc, regs);
- err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
-
- /* Set up to return from userspace. */
- err |= __put_user((void *) ret_from_user_rt_signal, &frame->pretcode);
-
- if (err)
- goto give_sigsegv;
-
- /* Set up registers for signal handler */
- wrusp ((unsigned long) frame);
- regs->pc = (unsigned long) ka->sa.sa_handler;
- ((struct switch_stack *)regs - 1)->a5 = current->mm->start_data;
- regs->format = 0x4; /*set format byte to make stack appear modulo 4
- which it will be when doing the rte */
-
-adjust_stack:
- /* Prepare to skip over the extra stuff in the exception frame. */
- if (regs->stkadj) {
- struct pt_regs *tregs =
- (struct pt_regs *)((ulong)regs + regs->stkadj);
-#if defined(DEBUG)
- printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs->stkadj);
-#endif
- /* This must be copied with decreasing addresses to
- handle overlaps. */
- tregs->vector = 0;
- tregs->format = 0;
- tregs->pc = regs->pc;
- tregs->sr = regs->sr;
- }
- return err;
-
-give_sigsegv:
- force_sigsegv(sig, current);
- goto adjust_stack;
-}
-
-static inline void
-handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
-{
- switch (regs->d0) {
- case -ERESTARTNOHAND:
- if (!has_handler)
- goto do_restart;
- regs->d0 = -EINTR;
- break;
-
- case -ERESTART_RESTARTBLOCK:
- if (!has_handler) {
- regs->d0 = __NR_restart_syscall;
- regs->pc -= 2;
- break;
- }
- regs->d0 = -EINTR;
- break;
-
- case -ERESTARTSYS:
- if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
- regs->d0 = -EINTR;
- break;
- }
- /* fallthrough */
- case -ERESTARTNOINTR:
- do_restart:
- regs->d0 = regs->orig_d0;
- regs->pc -= 2;
- break;
- }
-}
-
-/*
- * OK, we're invoking a handler
- */
-static void
-handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
- sigset_t *oldset, struct pt_regs *regs)
-{
- int err;
- /* are we from a system call? */
- if (regs->orig_d0 >= 0)
- /* If so, check system call restarting.. */
- handle_restart(regs, ka, 1);
-
- /* set up the stack frame */
- if (ka->sa.sa_flags & SA_SIGINFO)
- err = setup_rt_frame(sig, ka, info, oldset, regs);
- else
- err = setup_frame(sig, ka, oldset, regs);
-
- if (err)
- return;
-
- spin_lock_irq(&current->sighand->siglock);
- sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
- if (!(ka->sa.sa_flags & SA_NODEFER))
- sigaddset(&current->blocked,sig);
- recalc_sigpending();
- spin_unlock_irq(&current->sighand->siglock);
-
- clear_thread_flag(TIF_RESTORE_SIGMASK);
-}
-
-/*
- * Note that 'init' is a special process: it doesn't get signals it doesn't
- * want to handle. Thus you cannot kill init even with a SIGKILL even by
- * mistake.
- */
-asmlinkage void do_signal(struct pt_regs *regs)
-{
- struct k_sigaction ka;
- siginfo_t info;
- int signr;
- sigset_t *oldset;
-
- /*
- * We want the common case to go fast, which
- * is why we may in certain cases get here from
- * kernel mode. Just return without doing anything
- * if so.
- */
- if (!user_mode(regs))
- return;
-
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
- oldset = &current->saved_sigmask;
- else
- oldset = &current->blocked;
-
- signr = get_signal_to_deliver(&info, &ka, regs, NULL);
- if (signr > 0) {
- /* Whee! Actually deliver the signal. */
- handle_signal(signr, &ka, &info, oldset, regs);
- return;
- }
-
- /* Did we come from a system call? */
- if (regs->orig_d0 >= 0) {
- /* Restart the system call - no handlers present */
- handle_restart(regs, NULL, 0);
- }
-
- /* If there's no signal to deliver, we just restore the saved mask. */
- if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
- clear_thread_flag(TIF_RESTORE_SIGMASK);
- sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
- }
-}
diff --git a/arch/m68k/platform/5206/Makefile b/arch/m68k/platform/5206/Makefile
deleted file mode 100644
index b5db05625cfa..000000000000
--- a/arch/m68k/platform/5206/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# Makefile for the m68knommu linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y := config.o gpio.o
-
diff --git a/arch/m68k/platform/5206/gpio.c b/arch/m68k/platform/5206/gpio.c
deleted file mode 100644
index b9ab4a120f28..000000000000
--- a/arch/m68k/platform/5206/gpio.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "PP",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFSIM_PADDR,
- .podr = (void __iomem *) MCFSIM_PADAT,
- .ppdr = (void __iomem *) MCFSIM_PADAT,
- },
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/520x/Makefile b/arch/m68k/platform/520x/Makefile
deleted file mode 100644
index ad3f4e5a57ce..000000000000
--- a/arch/m68k/platform/520x/Makefile
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Makefile for the M5208 specific file.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y := config.o gpio.o
diff --git a/arch/m68k/platform/520x/gpio.c b/arch/m68k/platform/520x/gpio.c
deleted file mode 100644
index 9bcc3e4b60c5..000000000000
--- a/arch/m68k/platform/520x/gpio.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "PIRQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFEPORT_EPDDR,
- .podr = (void __iomem *) MCFEPORT_EPDR,
- .ppdr = (void __iomem *) MCFEPORT_EPPDR,
- },
- {
- .gpio_chip = {
- .label = "CS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 9,
- .ngpio = 3,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
- .podr = (void __iomem *) MCFGPIO_PODR_CS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
- },
- {
- .gpio_chip = {
- .label = "FECI2C",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 16,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
- .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
- },
- {
- .gpio_chip = {
- .label = "QSPI",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 24,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
- .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
- },
- {
- .gpio_chip = {
- .label = "TIMER",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 32,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
- .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
- },
- {
- .gpio_chip = {
- .label = "UART",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 40,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UART,
- .podr = (void __iomem *) MCFGPIO_PODR_UART,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UART,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UART,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UART,
- },
- {
- .gpio_chip = {
- .label = "FECH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 48,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECH,
- .podr = (void __iomem *) MCFGPIO_PODR_FECH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECH,
- },
- {
- .gpio_chip = {
- .label = "FECL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 56,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECL,
- .podr = (void __iomem *) MCFGPIO_PODR_FECL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECL,
- },
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/523x/Makefile b/arch/m68k/platform/523x/Makefile
deleted file mode 100644
index c04b8f71c88c..000000000000
--- a/arch/m68k/platform/523x/Makefile
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Makefile for the m68knommu linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y := config.o gpio.o
diff --git a/arch/m68k/platform/523x/gpio.c b/arch/m68k/platform/523x/gpio.c
deleted file mode 100644
index 327ebf142c8e..000000000000
--- a/arch/m68k/platform/523x/gpio.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "PIRQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 1,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFEPORT_EPDDR,
- .podr = (void __iomem *) MCFEPORT_EPDR,
- .ppdr = (void __iomem *) MCFEPORT_EPPDR,
- },
- {
- .gpio_chip = {
- .label = "ADDR",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 13,
- .ngpio = 3,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
- .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
- },
- {
- .gpio_chip = {
- .label = "DATAH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 16,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_DATAH,
- .podr = (void __iomem *) MCFGPIO_PODR_DATAH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAH,
- },
- {
- .gpio_chip = {
- .label = "DATAL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 24,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_DATAL,
- .podr = (void __iomem *) MCFGPIO_PODR_DATAL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAL,
- },
- {
- .gpio_chip = {
- .label = "BUSCTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 32,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
- .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
- },
- {
- .gpio_chip = {
- .label = "BS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 40,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
- .podr = (void __iomem *) MCFGPIO_PODR_BS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
- },
- {
- .gpio_chip = {
- .label = "CS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 49,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
- .podr = (void __iomem *) MCFGPIO_PODR_CS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
- },
- {
- .gpio_chip = {
- .label = "SDRAM",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 56,
- .ngpio = 6,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
- .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
- },
- {
- .gpio_chip = {
- .label = "FECI2C",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 64,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
- .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
- },
- {
- .gpio_chip = {
- .label = "UARTH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 72,
- .ngpio = 2,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
- },
- {
- .gpio_chip = {
- .label = "UARTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 80,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
- },
- {
- .gpio_chip = {
- .label = "QSPI",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 88,
- .ngpio = 5,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
- .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
- },
- {
- .gpio_chip = {
- .label = "TIMER",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 96,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
- .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
- },
- {
- .gpio_chip = {
- .label = "ETPU",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 104,
- .ngpio = 3,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_ETPU,
- .podr = (void __iomem *) MCFGPIO_PODR_ETPU,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ETPU,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_ETPU,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_ETPU,
- },
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5249/Makefile b/arch/m68k/platform/5249/Makefile
deleted file mode 100644
index 4bed30fd0073..000000000000
--- a/arch/m68k/platform/5249/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# Makefile for the m68knommu linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y := config.o gpio.o intc2.o
-
diff --git a/arch/m68k/platform/5249/gpio.c b/arch/m68k/platform/5249/gpio.c
deleted file mode 100644
index 2b56c6ef65bf..000000000000
--- a/arch/m68k/platform/5249/gpio.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "GPIO0",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .ngpio = 32,
- },
- .pddr = (void __iomem *) MCFSIM2_GPIOENABLE,
- .podr = (void __iomem *) MCFSIM2_GPIOWRITE,
- .ppdr = (void __iomem *) MCFSIM2_GPIOREAD,
- },
- {
- .gpio_chip = {
- .label = "GPIO1",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 32,
- .ngpio = 32,
- },
- .pddr = (void __iomem *) MCFSIM2_GPIO1ENABLE,
- .podr = (void __iomem *) MCFSIM2_GPIO1WRITE,
- .ppdr = (void __iomem *) MCFSIM2_GPIO1READ,
- },
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5272/Makefile b/arch/m68k/platform/5272/Makefile
deleted file mode 100644
index 34110fc14301..000000000000
--- a/arch/m68k/platform/5272/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y := config.o gpio.o intc.o
-
diff --git a/arch/m68k/platform/5272/gpio.c b/arch/m68k/platform/5272/gpio.c
deleted file mode 100644
index 57ac10a5d7f7..000000000000
--- a/arch/m68k/platform/5272/gpio.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "PA",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .ngpio = 16,
- },
- .pddr = (void __iomem *) MCFSIM_PADDR,
- .podr = (void __iomem *) MCFSIM_PADAT,
- .ppdr = (void __iomem *) MCFSIM_PADAT,
- },
- {
- .gpio_chip = {
- .label = "PB",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 16,
- .ngpio = 16,
- },
- .pddr = (void __iomem *) MCFSIM_PBDDR,
- .podr = (void __iomem *) MCFSIM_PBDAT,
- .ppdr = (void __iomem *) MCFSIM_PBDAT,
- },
- {
- .gpio_chip = {
- .label = "PC",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 32,
- .ngpio = 16,
- },
- .pddr = (void __iomem *) MCFSIM_PCDDR,
- .podr = (void __iomem *) MCFSIM_PCDAT,
- .ppdr = (void __iomem *) MCFSIM_PCDAT,
- },
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/527x/Makefile b/arch/m68k/platform/527x/Makefile
deleted file mode 100644
index 6ac4b57370ea..000000000000
--- a/arch/m68k/platform/527x/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y := config.o gpio.o
-
diff --git a/arch/m68k/platform/527x/gpio.c b/arch/m68k/platform/527x/gpio.c
deleted file mode 100644
index 205da0aa0f2d..000000000000
--- a/arch/m68k/platform/527x/gpio.c
+++ /dev/null
@@ -1,609 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
-#if defined(CONFIG_M5271)
- {
- .gpio_chip = {
- .label = "PIRQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 1,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFEPORT_EPDDR,
- .podr = (void __iomem *) MCFEPORT_EPDR,
- .ppdr = (void __iomem *) MCFEPORT_EPPDR,
- },
- {
- .gpio_chip = {
- .label = "ADDR",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 13,
- .ngpio = 3,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
- .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
- },
- {
- .gpio_chip = {
- .label = "DATAH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 16,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_DATAH,
- .podr = (void __iomem *) MCFGPIO_PODR_DATAH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAH,
- },
- {
- .gpio_chip = {
- .label = "DATAL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 24,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_DATAL,
- .podr = (void __iomem *) MCFGPIO_PODR_DATAL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAL,
- },
- {
- .gpio_chip = {
- .label = "BUSCTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 32,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
- .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
- },
- {
- .gpio_chip = {
- .label = "BS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 40,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
- .podr = (void __iomem *) MCFGPIO_PODR_BS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
- },
- {
- .gpio_chip = {
- .label = "CS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 49,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
- .podr = (void __iomem *) MCFGPIO_PODR_CS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
- },
- {
- .gpio_chip = {
- .label = "SDRAM",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 56,
- .ngpio = 6,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
- .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
- },
- {
- .gpio_chip = {
- .label = "FECI2C",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 64,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
- .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
- },
- {
- .gpio_chip = {
- .label = "UARTH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 72,
- .ngpio = 2,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
- },
- {
- .gpio_chip = {
- .label = "UARTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 80,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
- },
- {
- .gpio_chip = {
- .label = "QSPI",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 88,
- .ngpio = 5,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
- .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
- },
- {
- .gpio_chip = {
- .label = "TIMER",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 96,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
- .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
- },
-#elif defined(CONFIG_M5275)
- {
- .gpio_chip = {
- .label = "PIRQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 1,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFEPORT_EPDDR,
- .podr = (void __iomem *) MCFEPORT_EPDR,
- .ppdr = (void __iomem *) MCFEPORT_EPPDR,
- },
- {
- .gpio_chip = {
- .label = "BUSCTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 8,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
- .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
- },
- {
- .gpio_chip = {
- .label = "ADDR",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 21,
- .ngpio = 3,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
- .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
- },
- {
- .gpio_chip = {
- .label = "CS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 25,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
- .podr = (void __iomem *) MCFGPIO_PODR_CS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
- },
- {
- .gpio_chip = {
- .label = "FEC0H",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 32,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FEC0H,
- .podr = (void __iomem *) MCFGPIO_PODR_FEC0H,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC0H,
- },
- {
- .gpio_chip = {
- .label = "FEC0L",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 40,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FEC0L,
- .podr = (void __iomem *) MCFGPIO_PODR_FEC0L,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC0L,
- },
- {
- .gpio_chip = {
- .label = "FECI2C",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 48,
- .ngpio = 6,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
- .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
- },
- {
- .gpio_chip = {
- .label = "QSPI",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 56,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
- .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
- },
- {
- .gpio_chip = {
- .label = "SDRAM",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 64,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
- .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
- },
- {
- .gpio_chip = {
- .label = "TIMERH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 72,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_TIMERH,
- .podr = (void __iomem *) MCFGPIO_PODR_TIMERH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMERH,
- },
- {
- .gpio_chip = {
- .label = "TIMERL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 80,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_TIMERL,
- .podr = (void __iomem *) MCFGPIO_PODR_TIMERL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMERL,
- },
- {
- .gpio_chip = {
- .label = "UARTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 88,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
- },
- {
- .gpio_chip = {
- .label = "FEC1H",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 96,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FEC1H,
- .podr = (void __iomem *) MCFGPIO_PODR_FEC1H,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC1H,
- },
- {
- .gpio_chip = {
- .label = "FEC1L",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 104,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FEC1L,
- .podr = (void __iomem *) MCFGPIO_PODR_FEC1L,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC1L,
- },
- {
- .gpio_chip = {
- .label = "BS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 114,
- .ngpio = 2,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
- .podr = (void __iomem *) MCFGPIO_PODR_BS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
- },
- {
- .gpio_chip = {
- .label = "IRQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 121,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_IRQ,
- .podr = (void __iomem *) MCFGPIO_PODR_IRQ,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_IRQ,
- },
- {
- .gpio_chip = {
- .label = "USBH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 128,
- .ngpio = 1,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_USBH,
- .podr = (void __iomem *) MCFGPIO_PODR_USBH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_USBH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_USBH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_USBH,
- },
- {
- .gpio_chip = {
- .label = "USBL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 136,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_USBL,
- .podr = (void __iomem *) MCFGPIO_PODR_USBL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_USBL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_USBL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_USBL,
- },
- {
- .gpio_chip = {
- .label = "UARTH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 144,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
- },
-#endif
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/528x/Makefile b/arch/m68k/platform/528x/Makefile
deleted file mode 100644
index 6ac4b57370ea..000000000000
--- a/arch/m68k/platform/528x/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y := config.o gpio.o
-
diff --git a/arch/m68k/platform/528x/gpio.c b/arch/m68k/platform/528x/gpio.c
deleted file mode 100644
index 526db665d87e..000000000000
--- a/arch/m68k/platform/528x/gpio.c
+++ /dev/null
@@ -1,438 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "NQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 1,
- .ngpio = 7,
- },
- .pddr = (void __iomem *)MCFEPORT_EPDDR,
- .podr = (void __iomem *)MCFEPORT_EPDR,
- .ppdr = (void __iomem *)MCFEPORT_EPPDR,
- },
- {
- .gpio_chip = {
- .label = "TA",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 8,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPTA_GPTDDR,
- .podr = (void __iomem *)MCFGPTA_GPTPORT,
- .ppdr = (void __iomem *)MCFGPTB_GPTPORT,
- },
- {
- .gpio_chip = {
- .label = "TB",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 16,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPTB_GPTDDR,
- .podr = (void __iomem *)MCFGPTB_GPTPORT,
- .ppdr = (void __iomem *)MCFGPTB_GPTPORT,
- },
- {
- .gpio_chip = {
- .label = "QA",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 24,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFQADC_DDRQA,
- .podr = (void __iomem *)MCFQADC_PORTQA,
- .ppdr = (void __iomem *)MCFQADC_PORTQA,
- },
- {
- .gpio_chip = {
- .label = "QB",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 32,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFQADC_DDRQB,
- .podr = (void __iomem *)MCFQADC_PORTQB,
- .ppdr = (void __iomem *)MCFQADC_PORTQB,
- },
- {
- .gpio_chip = {
- .label = "A",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 40,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRA,
- .podr = (void __iomem *)MCFGPIO_PORTA,
- .ppdr = (void __iomem *)MCFGPIO_PORTAP,
- .setr = (void __iomem *)MCFGPIO_SETA,
- .clrr = (void __iomem *)MCFGPIO_CLRA,
- },
- {
- .gpio_chip = {
- .label = "B",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 48,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRB,
- .podr = (void __iomem *)MCFGPIO_PORTB,
- .ppdr = (void __iomem *)MCFGPIO_PORTBP,
- .setr = (void __iomem *)MCFGPIO_SETB,
- .clrr = (void __iomem *)MCFGPIO_CLRB,
- },
- {
- .gpio_chip = {
- .label = "C",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 56,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRC,
- .podr = (void __iomem *)MCFGPIO_PORTC,
- .ppdr = (void __iomem *)MCFGPIO_PORTCP,
- .setr = (void __iomem *)MCFGPIO_SETC,
- .clrr = (void __iomem *)MCFGPIO_CLRC,
- },
- {
- .gpio_chip = {
- .label = "D",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 64,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRD,
- .podr = (void __iomem *)MCFGPIO_PORTD,
- .ppdr = (void __iomem *)MCFGPIO_PORTDP,
- .setr = (void __iomem *)MCFGPIO_SETD,
- .clrr = (void __iomem *)MCFGPIO_CLRD,
- },
- {
- .gpio_chip = {
- .label = "E",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 72,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRE,
- .podr = (void __iomem *)MCFGPIO_PORTE,
- .ppdr = (void __iomem *)MCFGPIO_PORTEP,
- .setr = (void __iomem *)MCFGPIO_SETE,
- .clrr = (void __iomem *)MCFGPIO_CLRE,
- },
- {
- .gpio_chip = {
- .label = "F",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 80,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRF,
- .podr = (void __iomem *)MCFGPIO_PORTF,
- .ppdr = (void __iomem *)MCFGPIO_PORTFP,
- .setr = (void __iomem *)MCFGPIO_SETF,
- .clrr = (void __iomem *)MCFGPIO_CLRF,
- },
- {
- .gpio_chip = {
- .label = "G",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 88,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRG,
- .podr = (void __iomem *)MCFGPIO_PORTG,
- .ppdr = (void __iomem *)MCFGPIO_PORTGP,
- .setr = (void __iomem *)MCFGPIO_SETG,
- .clrr = (void __iomem *)MCFGPIO_CLRG,
- },
- {
- .gpio_chip = {
- .label = "H",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 96,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRH,
- .podr = (void __iomem *)MCFGPIO_PORTH,
- .ppdr = (void __iomem *)MCFGPIO_PORTHP,
- .setr = (void __iomem *)MCFGPIO_SETH,
- .clrr = (void __iomem *)MCFGPIO_CLRH,
- },
- {
- .gpio_chip = {
- .label = "J",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 104,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRJ,
- .podr = (void __iomem *)MCFGPIO_PORTJ,
- .ppdr = (void __iomem *)MCFGPIO_PORTJP,
- .setr = (void __iomem *)MCFGPIO_SETJ,
- .clrr = (void __iomem *)MCFGPIO_CLRJ,
- },
- {
- .gpio_chip = {
- .label = "DD",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 112,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRDD,
- .podr = (void __iomem *)MCFGPIO_PORTDD,
- .ppdr = (void __iomem *)MCFGPIO_PORTDDP,
- .setr = (void __iomem *)MCFGPIO_SETDD,
- .clrr = (void __iomem *)MCFGPIO_CLRDD,
- },
- {
- .gpio_chip = {
- .label = "EH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 120,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDREH,
- .podr = (void __iomem *)MCFGPIO_PORTEH,
- .ppdr = (void __iomem *)MCFGPIO_PORTEHP,
- .setr = (void __iomem *)MCFGPIO_SETEH,
- .clrr = (void __iomem *)MCFGPIO_CLREH,
- },
- {
- .gpio_chip = {
- .label = "EL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 128,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDREL,
- .podr = (void __iomem *)MCFGPIO_PORTEL,
- .ppdr = (void __iomem *)MCFGPIO_PORTELP,
- .setr = (void __iomem *)MCFGPIO_SETEL,
- .clrr = (void __iomem *)MCFGPIO_CLREL,
- },
- {
- .gpio_chip = {
- .label = "AS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 136,
- .ngpio = 6,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRAS,
- .podr = (void __iomem *)MCFGPIO_PORTAS,
- .ppdr = (void __iomem *)MCFGPIO_PORTASP,
- .setr = (void __iomem *)MCFGPIO_SETAS,
- .clrr = (void __iomem *)MCFGPIO_CLRAS,
- },
- {
- .gpio_chip = {
- .label = "QS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 144,
- .ngpio = 7,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRQS,
- .podr = (void __iomem *)MCFGPIO_PORTQS,
- .ppdr = (void __iomem *)MCFGPIO_PORTQSP,
- .setr = (void __iomem *)MCFGPIO_SETQS,
- .clrr = (void __iomem *)MCFGPIO_CLRQS,
- },
- {
- .gpio_chip = {
- .label = "SD",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 152,
- .ngpio = 6,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRSD,
- .podr = (void __iomem *)MCFGPIO_PORTSD,
- .ppdr = (void __iomem *)MCFGPIO_PORTSDP,
- .setr = (void __iomem *)MCFGPIO_SETSD,
- .clrr = (void __iomem *)MCFGPIO_CLRSD,
- },
- {
- .gpio_chip = {
- .label = "TC",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 160,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRTC,
- .podr = (void __iomem *)MCFGPIO_PORTTC,
- .ppdr = (void __iomem *)MCFGPIO_PORTTCP,
- .setr = (void __iomem *)MCFGPIO_SETTC,
- .clrr = (void __iomem *)MCFGPIO_CLRTC,
- },
- {
- .gpio_chip = {
- .label = "TD",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 168,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRTD,
- .podr = (void __iomem *)MCFGPIO_PORTTD,
- .ppdr = (void __iomem *)MCFGPIO_PORTTDP,
- .setr = (void __iomem *)MCFGPIO_SETTD,
- .clrr = (void __iomem *)MCFGPIO_CLRTD,
- },
- {
- .gpio_chip = {
- .label = "UA",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 176,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRUA,
- .podr = (void __iomem *)MCFGPIO_PORTUA,
- .ppdr = (void __iomem *)MCFGPIO_PORTUAP,
- .setr = (void __iomem *)MCFGPIO_SETUA,
- .clrr = (void __iomem *)MCFGPIO_CLRUA,
- },
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5307/Makefile b/arch/m68k/platform/5307/Makefile
deleted file mode 100644
index d4293b791f2e..000000000000
--- a/arch/m68k/platform/5307/Makefile
+++ /dev/null
@@ -1,20 +0,0 @@
-#
-# Makefile for the m68knommu kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y += config.o gpio.o
-obj-$(CONFIG_NETtel) += nettel.o
-obj-$(CONFIG_CLEOPATRA) += nettel.o
-
diff --git a/arch/m68k/platform/5307/gpio.c b/arch/m68k/platform/5307/gpio.c
deleted file mode 100644
index 5850612b4a38..000000000000
--- a/arch/m68k/platform/5307/gpio.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "PP",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .ngpio = 16,
- },
- .pddr = (void __iomem *) MCFSIM_PADDR,
- .podr = (void __iomem *) MCFSIM_PADAT,
- .ppdr = (void __iomem *) MCFSIM_PADAT,
- },
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/532x/Makefile b/arch/m68k/platform/532x/Makefile
deleted file mode 100644
index ce01669399c6..000000000000
--- a/arch/m68k/platform/532x/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# Makefile for the m68knommu linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-#obj-y := config.o usb-mcf532x.o spi-mcf532x.o
-obj-y := config.o gpio.o
diff --git a/arch/m68k/platform/532x/gpio.c b/arch/m68k/platform/532x/gpio.c
deleted file mode 100644
index 212a85deac90..000000000000
--- a/arch/m68k/platform/532x/gpio.c
+++ /dev/null
@@ -1,337 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "PIRQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFEPORT_EPDDR,
- .podr = (void __iomem *) MCFEPORT_EPDR,
- .ppdr = (void __iomem *) MCFEPORT_EPPDR,
- },
- {
- .gpio_chip = {
- .label = "FECH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 8,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECH,
- .podr = (void __iomem *) MCFGPIO_PODR_FECH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECH,
- },
- {
- .gpio_chip = {
- .label = "FECL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 16,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECL,
- .podr = (void __iomem *) MCFGPIO_PODR_FECL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECL,
- },
- {
- .gpio_chip = {
- .label = "SSI",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 24,
- .ngpio = 5,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_SSI,
- .podr = (void __iomem *) MCFGPIO_PODR_SSI,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SSI,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_SSI,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_SSI,
- },
- {
- .gpio_chip = {
- .label = "BUSCTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 32,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
- .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
- },
- {
- .gpio_chip = {
- .label = "BE",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 40,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BE,
- .podr = (void __iomem *) MCFGPIO_PODR_BE,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BE,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BE,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BE,
- },
- {
- .gpio_chip = {
- .label = "CS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 49,
- .ngpio = 5,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
- .podr = (void __iomem *) MCFGPIO_PODR_CS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
- },
- {
- .gpio_chip = {
- .label = "PWM",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 58,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_PWM,
- .podr = (void __iomem *) MCFGPIO_PODR_PWM,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_PWM,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_PWM,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_PWM,
- },
- {
- .gpio_chip = {
- .label = "FECI2C",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 64,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
- .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
- },
- {
- .gpio_chip = {
- .label = "UART",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 72,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UART,
- .podr = (void __iomem *) MCFGPIO_PODR_UART,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UART,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UART,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UART,
- },
- {
- .gpio_chip = {
- .label = "QSPI",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 80,
- .ngpio = 6,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
- .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
- },
- {
- .gpio_chip = {
- .label = "TIMER",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 88,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
- .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
- },
- {
- .gpio_chip = {
- .label = "LCDDATAH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 96,
- .ngpio = 2,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_LCDDATAH,
- .podr = (void __iomem *) MCFGPIO_PODR_LCDDATAH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDDATAH,
- },
- {
- .gpio_chip = {
- .label = "LCDDATAM",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 104,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_LCDDATAM,
- .podr = (void __iomem *) MCFGPIO_PODR_LCDDATAM,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDDATAM,
- },
- {
- .gpio_chip = {
- .label = "LCDDATAL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 112,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_LCDDATAL,
- .podr = (void __iomem *) MCFGPIO_PODR_LCDDATAL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDDATAL,
- },
- {
- .gpio_chip = {
- .label = "LCDCTLH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 120,
- .ngpio = 1,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_LCDCTLH,
- .podr = (void __iomem *) MCFGPIO_PODR_LCDCTLH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDCTLH,
- },
- {
- .gpio_chip = {
- .label = "LCDCTLL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 128,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_LCDCTLL,
- .podr = (void __iomem *) MCFGPIO_PODR_LCDCTLL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDCTLL,
- },
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5407/Makefile b/arch/m68k/platform/5407/Makefile
deleted file mode 100644
index e83fe148eddc..000000000000
--- a/arch/m68k/platform/5407/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# Makefile for the m68knommu linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# ccflags-y := -DTRAP_DBG_INTERRUPT
-# asflags-y := -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y := config.o gpio.o
-
diff --git a/arch/m68k/platform/5407/gpio.c b/arch/m68k/platform/5407/gpio.c
deleted file mode 100644
index 5850612b4a38..000000000000
--- a/arch/m68k/platform/5407/gpio.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "PP",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .ngpio = 16,
- },
- .pddr = (void __iomem *) MCFSIM_PADDR,
- .podr = (void __iomem *) MCFSIM_PADAT,
- .ppdr = (void __iomem *) MCFSIM_PADAT,
- },
-};
-
-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/54xx/Makefile b/arch/m68k/platform/54xx/Makefile
deleted file mode 100644
index 6cfd090ec3cd..000000000000
--- a/arch/m68k/platform/54xx/Makefile
+++ /dev/null
@@ -1,19 +0,0 @@
-#
-# Makefile for the m68knommu linux kernel.
-#
-
-#
-# If you want to play with the HW breakpoints then you will
-# need to add define this, which will give you a stack backtrace
-# on the console port whenever a DBG interrupt occurs. You have to
-# set up you HW breakpoints to trigger a DBG interrupt:
-#
-# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT
-# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT
-#
-
-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
-
-obj-y := config.o
-obj-$(CONFIG_FIREBEE) += firebee.o
-
diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile
index a0815c61dec1..76d389d9a84e 100644
--- a/arch/m68k/platform/coldfire/Makefile
+++ b/arch/m68k/platform/coldfire/Makefile
@@ -15,18 +15,22 @@
asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o
-obj-$(CONFIG_M5206) += timers.o intc.o reset.o
-obj-$(CONFIG_M5206e) += timers.o intc.o reset.o
-obj-$(CONFIG_M520x) += pit.o intc-simr.o reset.o
-obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o reset.o
-obj-$(CONFIG_M5249) += timers.o intc.o reset.o
-obj-$(CONFIG_M527x) += pit.o intc-2.o reset.o
-obj-$(CONFIG_M5272) += timers.o
-obj-$(CONFIG_M528x) += pit.o intc-2.o reset.o
-obj-$(CONFIG_M5307) += timers.o intc.o reset.o
-obj-$(CONFIG_M532x) += timers.o intc-simr.o reset.o
-obj-$(CONFIG_M5407) += timers.o intc.o reset.o
-obj-$(CONFIG_M54xx) += sltimers.o intc-2.o
+obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
+obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
+obj-$(CONFIG_M520x) += m520x.o pit.o intc-simr.o reset.o
+obj-$(CONFIG_M523x) += m523x.o pit.o dma_timer.o intc-2.o reset.o
+obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
+obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o
+obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
+obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o
+obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
+obj-$(CONFIG_M532x) += m532x.o timers.o intc-simr.o reset.o
+obj-$(CONFIG_M5407) += m5407.o timers.o intc.o reset.o
+obj-$(CONFIG_M54xx) += m54xx.o sltimers.o intc-2.o
+
+obj-$(CONFIG_NETtel) += nettel.o
+obj-$(CONFIG_CLEOPATRA) += nettel.o
+obj-$(CONFIG_FIREBEE) += firebee.o
obj-y += pinmux.o gpio.o
extra-y := head.o
diff --git a/arch/m68k/platform/54xx/firebee.c b/arch/m68k/platform/coldfire/firebee.c
index 46d50534f981..46d50534f981 100644
--- a/arch/m68k/platform/54xx/firebee.c
+++ b/arch/m68k/platform/coldfire/firebee.c
diff --git a/arch/m68k/platform/coldfire/gpio.c b/arch/m68k/platform/coldfire/gpio.c
index 292a1a5a2d7c..4c8c42450a4e 100644
--- a/arch/m68k/platform/coldfire/gpio.c
+++ b/arch/m68k/platform/coldfire/gpio.c
@@ -122,6 +122,10 @@ struct bus_type mcf_gpio_subsys = {
static int __init mcf_gpio_sysinit(void)
{
+ unsigned int i = 0;
+
+ while (i < mcf_gpio_chips_size)
+ gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
return subsys_system_register(&mcf_gpio_subsys, NULL);
}
diff --git a/arch/m68k/platform/5249/intc2.c b/arch/m68k/platform/coldfire/intc-5249.c
index f343bf7bf5b0..f343bf7bf5b0 100644
--- a/arch/m68k/platform/5249/intc2.c
+++ b/arch/m68k/platform/coldfire/intc-5249.c
diff --git a/arch/m68k/platform/5272/intc.c b/arch/m68k/platform/coldfire/intc-5272.c
index 7160e618b0a9..7160e618b0a9 100644
--- a/arch/m68k/platform/5272/intc.c
+++ b/arch/m68k/platform/coldfire/intc-5272.c
diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/coldfire/m5206.c
index 6bfbeebd231b..a8b81df653f0 100644
--- a/arch/m68k/platform/5206/config.c
+++ b/arch/m68k/platform/coldfire/m5206.c
@@ -16,6 +16,15 @@
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PP, 0, 8, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
/***************************************************************************/
diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/coldfire/m520x.c
index 09df4b89e8be..3264b8883d5f 100644
--- a/arch/m68k/platform/520x/config.c
+++ b/arch/m68k/platform/coldfire/m520x.c
@@ -19,6 +19,22 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(CS, 9, 3),
+ MCFGPF(FECI2C, 16, 4),
+ MCFGPF(QSPI, 24, 4),
+ MCFGPF(TIMER, 32, 4),
+ MCFGPF(UART, 40, 8),
+ MCFGPF(FECH, 48, 8),
+ MCFGPF(FECL, 56, 8),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
/***************************************************************************/
diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/coldfire/m523x.c
index d47dfd8f50a2..5d57a4249412 100644
--- a/arch/m68k/platform/523x/config.c
+++ b/arch/m68k/platform/coldfire/m523x.c
@@ -19,6 +19,28 @@
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(ADDR, 13, 3),
+ MCFGPF(DATAH, 16, 8),
+ MCFGPF(DATAL, 24, 8),
+ MCFGPF(BUSCTL, 32, 8),
+ MCFGPF(BS, 40, 4),
+ MCFGPF(CS, 49, 7),
+ MCFGPF(SDRAM, 56, 6),
+ MCFGPF(FECI2C, 64, 4),
+ MCFGPF(UARTH, 72, 2),
+ MCFGPF(UARTL, 80, 8),
+ MCFGPF(QSPI, 88, 5),
+ MCFGPF(TIMER, 96, 8),
+ MCFGPF(ETPU, 104, 3),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
/***************************************************************************/
diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/coldfire/m5249.c
index 300e729a58d0..fdfa1edfd1ac 100644
--- a/arch/m68k/platform/5249/config.c
+++ b/arch/m68k/platform/coldfire/m5249.c
@@ -16,6 +16,16 @@
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(GPIO0, 0, 32, MCFSIM2_GPIOENABLE, MCFSIM2_GPIOWRITE, MCFSIM2_GPIOREAD),
+ MCFGPS(GPIO1, 32, 32, MCFSIM2_GPIO1ENABLE, MCFSIM2_GPIO1WRITE, MCFSIM2_GPIO1READ),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
/***************************************************************************/
diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/coldfire/m5272.c
index e68bc7a148eb..43e36060da18 100644
--- a/arch/m68k/platform/5272/config.c
+++ b/arch/m68k/platform/coldfire/m5272.c
@@ -19,6 +19,7 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfgpio.h>
/***************************************************************************/
@@ -30,6 +31,16 @@ unsigned char ledbank = 0xff;
/***************************************************************************/
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PA, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
+ MCFGPS(PB, 16, 16, MCFSIM_PBDDR, MCFSIM_PBDAT, MCFSIM_PBDAT),
+ MCFGPS(Pc, 32, 16, MCFSIM_PCDDR, MCFSIM_PCDAT, MCFSIM_PCDAT),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
+
+/***************************************************************************/
+
static void __init m5272_uarts_init(void)
{
u32 v;
diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/coldfire/m527x.c
index b3cb378c5e94..9b0b66aabd1b 100644
--- a/arch/m68k/platform/527x/config.c
+++ b/arch/m68k/platform/coldfire/m527x.c
@@ -20,6 +20,49 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+#if defined(CONFIG_M5271)
+ MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(ADDR, 13, 3),
+ MCFGPF(DATAH, 16, 8),
+ MCFGPF(DATAL, 24, 8),
+ MCFGPF(BUSCTL, 32, 8),
+ MCFGPF(BS, 40, 4),
+ MCFGPF(CS, 49, 7),
+ MCFGPF(SDRAM, 56, 6),
+ MCFGPF(FECI2C, 64, 4),
+ MCFGPF(UARTH, 72, 2),
+ MCFGPF(UARTL, 80, 8),
+ MCFGPF(QSPI, 88, 5),
+ MCFGPF(TIMER, 96, 8),
+#elif defined(CONFIG_M5275)
+ MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(BUSCTL, 8, 8),
+ MCFGPF(ADDR, 21, 3),
+ MCFGPF(CS, 25, 7),
+ MCFGPF(FEC0H, 32, 8),
+ MCFGPF(FEC0L, 40, 8),
+ MCFGPF(FECI2C, 48, 6),
+ MCFGPF(QSPI, 56, 7),
+ MCFGPF(SDRAM, 64, 8),
+ MCFGPF(TIMERH, 72, 4),
+ MCFGPF(TIMERL, 80, 4),
+ MCFGPF(UARTL, 88, 8),
+ MCFGPF(FEC1H, 96, 8),
+ MCFGPF(FEC1L, 104, 8),
+ MCFGPF(BS, 114, 2),
+ MCFGPF(IRQ, 121, 7),
+ MCFGPF(USBH, 128, 1),
+ MCFGPF(USBL, 136, 8),
+ MCFGPF(UARTH, 144, 4),
+#endif
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
/***************************************************************************/
diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/coldfire/m528x.c
index c5f11ba49be5..7ed1276b29dc 100644
--- a/arch/m68k/platform/528x/config.c
+++ b/arch/m68k/platform/coldfire/m528x.c
@@ -21,6 +21,37 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(NQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPS(TA, 8, 4, MCFGPTA_GPTDDR, MCFGPTA_GPTPORT, MCFGPTB_GPTPORT),
+ MCFGPS(TB, 16, 4, MCFGPTB_GPTDDR, MCFGPTB_GPTPORT, MCFGPTB_GPTPORT),
+ MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA),
+ MCFGPS(QB, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB),
+ MCFGPF(A, 40, 8),
+ MCFGPF(B, 48, 8),
+ MCFGPF(C, 56, 8),
+ MCFGPF(D, 64, 8),
+ MCFGPF(E, 72, 8),
+ MCFGPF(F, 80, 8),
+ MCFGPF(G, 88, 8),
+ MCFGPF(H, 96, 8),
+ MCFGPF(J, 104, 8),
+ MCFGPF(DD, 112, 8),
+ MCFGPF(EH, 120, 8),
+ MCFGPF(EL, 128, 8),
+ MCFGPF(AS, 136, 6),
+ MCFGPF(QS, 144, 7),
+ MCFGPF(SD, 152, 6),
+ MCFGPF(TC, 160, 4),
+ MCFGPF(TD, 168, 4),
+ MCFGPF(UA, 176, 4),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
/***************************************************************************/
diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/coldfire/m5307.c
index a568d2870d15..93b484976ab3 100644
--- a/arch/m68k/platform/5307/config.c
+++ b/arch/m68k/platform/coldfire/m5307.c
@@ -16,6 +16,7 @@
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
#include <asm/mcfwdebug.h>
/***************************************************************************/
@@ -28,6 +29,14 @@ unsigned char ledbank = 0xff;
/***************************************************************************/
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PP, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
+
+/***************************************************************************/
+
void __init config_BSP(char *commandp, int size)
{
#if defined(CONFIG_NETtel) || \
diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/coldfire/m532x.c
index 37082d02f2bd..8e9476d59a65 100644
--- a/arch/m68k/platform/532x/config.c
+++ b/arch/m68k/platform/coldfire/m532x.c
@@ -26,10 +26,35 @@
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
#include <asm/mcfdma.h>
+#include <asm/mcfgpio.h>
#include <asm/mcfwdebug.h>
/***************************************************************************/
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(FECH, 8, 8),
+ MCFGPF(FECL, 16, 8),
+ MCFGPF(SSI, 24, 5),
+ MCFGPF(BUSCTL, 32, 4),
+ MCFGPF(BE, 40, 4),
+ MCFGPF(CS, 49, 5),
+ MCFGPF(PWM, 58, 4),
+ MCFGPF(FECI2C, 64, 4),
+ MCFGPF(UART, 72, 8),
+ MCFGPF(QSPI, 80, 6),
+ MCFGPF(TIMER, 88, 4),
+ MCFGPF(LCDDATAH, 96, 2),
+ MCFGPF(LCDDATAM, 104, 8),
+ MCFGPF(LCDDATAL, 112, 8),
+ MCFGPF(LCDCTLH, 120, 1),
+ MCFGPF(LCDCTLL, 128, 8),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
+
+/***************************************************************************/
+
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
static void __init m532x_qspi_init(void)
diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/coldfire/m5407.c
index bb6c746ae819..faa6680b3404 100644
--- a/arch/m68k/platform/5407/config.c
+++ b/arch/m68k/platform/coldfire/m5407.c
@@ -16,6 +16,15 @@
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PP, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
/***************************************************************************/
diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/coldfire/m54xx.c
index 2081c6cbb3de..20672dadb252 100644
--- a/arch/m68k/platform/54xx/config.c
+++ b/arch/m68k/platform/coldfire/m54xx.c
@@ -21,12 +21,19 @@
#include <asm/m54xxsim.h>
#include <asm/mcfuart.h>
#include <asm/m54xxgpt.h>
+#include <asm/mcfgpio.h>
#ifdef CONFIG_MMU
#include <asm/mmu_context.h>
#endif
/***************************************************************************/
+struct mcf_gpio_chip mcf_gpio_chips[] = { };
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
+
+/***************************************************************************/
+
static void __init m54xx_uarts_init(void)
{
/* enable io pins */
diff --git a/arch/m68k/platform/5307/nettel.c b/arch/m68k/platform/coldfire/nettel.c
index e925ea4602f8..e925ea4602f8 100644
--- a/arch/m68k/platform/5307/nettel.c
+++ b/arch/m68k/platform/coldfire/nettel.c