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authorLinus Torvalds <torvalds@linux-foundation.org>2016-10-05 21:34:53 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2016-10-05 21:34:53 +0300
commit64cbd16a8751fde075aa103dc7823a8c05805104 (patch)
tree09c6a4f46ceaaa6d949862413a064b7eb5f8c1b6 /arch
parentedadd0e5a7f9970553423ebd08172c9e3d1fb189 (diff)
parent0f75c404503cc49cbe92555fbab80a584c1f4ae2 (diff)
downloadlinux-64cbd16a8751fde075aa103dc7823a8c05805104.tar.xz
Merge tag 'mmc-v4.9' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC updates from Ulf Hansson: MMC core: - Add support for sending commands during data transfer - Erase/discard/trim improvements - Improved error handling - Extend sysfs with SD status register - Document info about the vmmc/vmmcq regulators - Extend pwrseq-simple to manage an optional post-power-on-delay - Some various minor improvements and cleanups MMC host: - dw_mmc: Add reset support - dw_mmc: Return -EILSEQ for EBE and SBE error - dw_mmc: Some cleanups - dw_mmc-k3: Add UHS-I support Hisilicon Hikey - tmio: Add eMMC support - sh_mobile_sdhi: Add r8a7796 support - sunxi: Don't use sample clocks for sun4i/sun5i - sunxi: Add support for A64 mmc controller - sunxi: Some cleanups and improvements - sdhci: Support for sending commands during data transfer - sdhci: Do not allow tuning procedure to be interrupted - sdhci-pci: Enable SD/SDIO on Merrifield - sdhci-pci|acpi: Enable MMC_CAP_CMD_DURING_TFR - sdhci-pci: Some cleanups - sdhci-of-arasan: Set controller to test mode when no CD bit - sdhci-of-arasan: Some fixes for clocks and phys - sdhci-brcmstb: Don't use ADMA 64-bit when not supported - sdhci-tegra: Mark 64-bit DMA broken on Tegra124 - sdhci-esdhc-imx: Fixups related to data timeouts * tag 'mmc-v4.9' of git://git.linaro.org/people/ulf.hansson/mmc: (68 commits) mmc: dw_mmc: remove the deprecated "supports-highspeed" property mmc: dw_mmc: minor cleanup for dw_mci_adjust_fifoth mmc: dw_mmc: use macro to define ring buffer size mmc: dw_mmc: fix misleading error print if failing to do DMA transfer mmc: dw_mmc: avoid race condition of cpu and IDMAC mmc: dw_mmc: split out preparation of desc for IDMAC32 and IDMAC64 mmc: core: don't try to switch block size for dual rate mode mmc: sdhci-of-arasan: Set controller to test mode when no CD bit dt: sdhci-of-arasan: Add device tree option xlnx, fails-without-test-cd mmc: tmio: add eMMC support mmc: rtsx_usb: use new macro for R1 without CRC mmc: rtsx_pci: use new macro for R1 without CRC mmc: add define for R1 response without CRC mmc: card: do away with indirection pointer mmc: sdhci-acpi: Set MMC_CAP_CMD_DURING_TFR for Intel eMMC controllers mmc: sdhci-pci: Set MMC_CAP_CMD_DURING_TFR for Intel eMMC controllers mmc: sdhci: Support cap_cmd_during_tfr requests mmc: mmc_test: Add tests for sending commands during transfer mmc: core: Add support for sending commands during data transfer mmc: sdhci-brcmstb: Fix incorrect capability ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi8
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi8
-rw-r--r--arch/arm/boot/dts/sun8i-a23-a33.dtsi6
-rw-r--r--arch/arm/boot/dts/sun8i-h3.dtsi6
4 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 1867af24ff52..0d24f107ede0 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -469,7 +469,7 @@
};
mmc0: mmc@01c0f000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ahb1_gates 8>,
<&mmc0_clk 0>,
@@ -488,7 +488,7 @@
};
mmc1: mmc@01c10000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c10000 0x1000>;
clocks = <&ahb1_gates 9>,
<&mmc1_clk 0>,
@@ -507,7 +507,7 @@
};
mmc2: mmc@01c11000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c11000 0x1000>;
clocks = <&ahb1_gates 10>,
<&mmc2_clk 0>,
@@ -526,7 +526,7 @@
};
mmc3: mmc@01c12000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c12000 0x1000>;
clocks = <&ahb1_gates 11>,
<&mmc3_clk 0>,
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index bd0c47660243..94cf5a1c7172 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -905,7 +905,7 @@
};
mmc0: mmc@01c0f000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ahb_gates 8>,
<&mmc0_clk 0>,
@@ -922,7 +922,7 @@
};
mmc1: mmc@01c10000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c10000 0x1000>;
clocks = <&ahb_gates 9>,
<&mmc1_clk 0>,
@@ -939,7 +939,7 @@
};
mmc2: mmc@01c11000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c11000 0x1000>;
clocks = <&ahb_gates 10>,
<&mmc2_clk 0>,
@@ -956,7 +956,7 @@
};
mmc3: mmc@01c12000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c12000 0x1000>;
clocks = <&ahb_gates 11>,
<&mmc3_clk 0>,
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 7e05e09e61c7..e3b196e08ccf 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -266,7 +266,7 @@
};
mmc0: mmc@01c0f000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ahb1_gates 8>,
<&mmc0_clk 0>,
@@ -285,7 +285,7 @@
};
mmc1: mmc@01c10000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c10000 0x1000>;
clocks = <&ahb1_gates 9>,
<&mmc1_clk 0>,
@@ -304,7 +304,7 @@
};
mmc2: mmc@01c11000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c11000 0x1000>;
clocks = <&ahb1_gates 10>,
<&mmc2_clk 0>,
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index fdf9fdbda267..8a95e3613488 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -150,7 +150,7 @@
};
mmc0: mmc@01c0f000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ccu CLK_BUS_MMC0>,
<&ccu CLK_MMC0>,
@@ -169,7 +169,7 @@
};
mmc1: mmc@01c10000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c10000 0x1000>;
clocks = <&ccu CLK_BUS_MMC1>,
<&ccu CLK_MMC1>,
@@ -188,7 +188,7 @@
};
mmc2: mmc@01c11000 {
- compatible = "allwinner,sun5i-a13-mmc";
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c11000 0x1000>;
clocks = <&ccu CLK_BUS_MMC2>,
<&ccu CLK_MMC2>,