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authorBen Dooks <ben-linux@fluff.org>2008-10-21 17:07:03 +0400
committerBen Dooks <ben-linux@fluff.org>2008-12-16 00:58:11 +0300
commitb690ace50be7d10d77cb7a6d5ef1bd9de649852f (patch)
tree280a5f1ae30ad16669e02f664923afaf4d0d41c3 /arch
parentcf18acf0e04260ff8ffa46dc245d3d2324ed41b0 (diff)
downloadlinux-b690ace50be7d10d77cb7a6d5ef1bd9de649852f.tar.xz
[ARM] S3C6400: serial support for S3C6400 and S3C6410 SoCs
Add support to the Samsung serial driver for the S3C6400 and S3C6410 serial ports. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c2410/include/mach/map.h2
-rw-r--r--arch/arm/mach-s3c24a0/include/mach/map.h2
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-serial.h6
3 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index 6b30361a0805..918e3463297f 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -101,4 +101,6 @@
#define S3C24XX_PA_SDI S3C2410_PA_SDI
#define S3C24XX_PA_NAND S3C2410_PA_NAND
+#define S3C_PA_UART S3C24XX_PA_UART
+
#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s3c24a0/include/mach/map.h b/arch/arm/mach-s3c24a0/include/mach/map.h
index 2ce1839de4ee..6667355a47a1 100644
--- a/arch/arm/mach-s3c24a0/include/mach/map.h
+++ b/arch/arm/mach-s3c24a0/include/mach/map.h
@@ -80,4 +80,6 @@
#define S3C24XX_PA_SDI S3C24A0_PA_SDI
#define S3C24XX_PA_NAND S3C24A0_PA_NAND
+#define S3C_PA_UART S3C24A0_PA_UART
+
#endif /* __ASM_ARCH_24A0_MAP_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-s3c/include/plat/regs-serial.h
index 18ba31c7174c..3ca28585cf80 100644
--- a/arch/arm/plat-s3c/include/plat/regs-serial.h
+++ b/arch/arm/plat-s3c/include/plat/regs-serial.h
@@ -77,6 +77,12 @@
#define S3C2440_UCON_FCLK (3<<10)
#define S3C2443_UCON_EPLL (3<<10)
+#define S3C6400_UCON_CLKMASK (3<<10)
+#define S3C6400_UCON_PCLK (0<<10)
+#define S3C6400_UCON_PCLK2 (2<<10)
+#define S3C6400_UCON_UCLK0 (1<<10)
+#define S3C6400_UCON_UCLK1 (3<<10)
+
#define S3C2440_UCON2_FCLK_EN (1<<15)
#define S3C2440_UCON0_DIVMASK (15 << 12)
#define S3C2440_UCON1_DIVMASK (15 << 12)