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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-04-16 15:37:29 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-05-26 23:29:08 +0300 |
| commit | ec888e6cff94af8fc5889824d98b1f1df65f3131 (patch) | |
| tree | ace2b7e73b877d9a2eb818cf0475ca8b8aad0328 /arch | |
| parent | 2438aba45f65b723763299a7b34eddfc40923680 (diff) | |
| download | linux-ec888e6cff94af8fc5889824d98b1f1df65f3131.tar.xz | |
arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequency
The SM8550 DTSI defines a fixed PCIE1 PHY AUX clock and expects boards
to define frequency. Use the same as in MTP8550 to fix:
sm8550-qrd.dtb: pcie-1-phy-aux-clk: 'clock-frequency' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416123730.300863-5-krzysztof.kozlowski@linaro.org
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts index ade6ba53ae6b..8669d29144bb 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts @@ -521,6 +521,10 @@ vdd3-supply = <&vreg_l5b_3p1>; }; +&pcie_1_phy_aux_clk { + clock-frequency = <1000>; +}; + &qupv3_id_0 { status = "okay"; }; |