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| author | Alexandre Ghiti <alexghiti@rivosinc.com> | 2023-08-02 11:03:21 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-08-16 17:28:17 +0300 |
| commit | e8b785e98abb0cc12edd4ba2d3ccad767ab8b68d (patch) | |
| tree | 87e724167adc3b4c01af9a3fb3bcdaefa2d82414 /certs | |
| parent | f117ae55b0198dd6fc36ce521e06d8b44a4bb203 (diff) | |
| download | linux-e8b785e98abb0cc12edd4ba2d3ccad767ab8b68d.tar.xz | |
riscv: Make legacy counter enum match the HW numbering
RISCV_PMU_LEGACY_INSTRET used to be set to 1 whereas the offset of this
hardware counter from CSR_CYCLE is actually 2: make this offset match the
real hw offset so that we can directly expose those values to userspace.
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Diffstat (limited to 'certs')
0 files changed, 0 insertions, 0 deletions