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authorHans de Goede <hdegoede@redhat.com>2018-09-23 16:58:11 +0300
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2018-09-30 23:38:24 +0300
commit48402cee6889fb3fce58e95fea1471626286dc63 (patch)
tree1892f908d658b150874494797f84b52beedb3c92 /crypto/async_tx
parent2d71ee0ce72f2597962fb2e66153f94d692142ba (diff)
downloadlinux-48402cee6889fb3fce58e95fea1471626286dc63.tar.xz
ACPI / LPSS: Resume BYT/CHT I2C controllers from resume_noirq
On some Cherry Trail systems the GPU ACPI fwnode has power-resources which point to the PMIC, which is connected over a LPSS I2C controller. We add a device-link to make sure that the I2C controller is resumed before the GPU is. But the pci-core changes the power-state of PCI devices from D3 to D0 at noirq time (to restore the PCI config registers) and before this commit we were bringing up the I2C controllers from a resume_early handler which runs later. More specifically the pm-core will first run all resume_noirq handlers in order and then all resume_early handlers. So we must not only make sure that the handlers are run in the right order, but also that the resume of the I2C controller is done at noirq time. The behavior before this commit, resuming the I2C controller from a resume_early handler leads to the following errors: i2c_designware 808622C1:06: controller timed out ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion] ACPI Error: Method parse/execution failed \_SB.P18W._ON, AE_ERROR video LNXVIDEO:00: Failed to change power state to D0 This commit changes the acpi_lpss.c code to resume the BYT/CHT I2C controllers at resume_noirq time fixing this. Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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