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author | Karol Wachowski <karol.wachowski@linux.intel.com> | 2023-05-18 16:16:04 +0300 |
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committer | Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com> | 2023-06-08 08:53:51 +0300 |
commit | 103d2ea13923cae3df232072d921fe0772a0a0fd (patch) | |
tree | df170a26f9e8e1cc1486094781160a681dcbde93 /drivers/accel/ivpu/ivpu_mmu_context.h | |
parent | a4172d6cf0a2b9f6fe6c5edb43e9aa32f62ac42e (diff) | |
download | linux-103d2ea13923cae3df232072d921fe0772a0a0fd.tar.xz |
accel/ivpu: Rename and cleanup MMU600 page tables
Simplify and unify naming convention in MMU600 page tables
configuration.
All DMA addresses in page tables directly accessed by VPU are called
with _dma sufix and all CPU pointers to those page tables have _ptr
sufix.
Base pointers used to do a page walk on the CPU have corresponding
names:
pud_ptrs (pointers used to get access to PUD DMA)
pmd_ptrs (pointers used to get access to PMD DMA)
pte_ptrs (pointers used to get access to PTE DMA)
with the following convention:
u64 *pud_dma_ptr = pud_ptrs[pgd_idx];
*pud_dma_ptr = pud_dma;
u64 *pmd_dma_ptr = pmd_ptrs[pgd_idx][pud_idx];
*pmd_dma_ptr = pmd_dma;
u64 *pte_dma_ptr = pte_ptrs[pgd_idx][pud_idx][pmd_idx];
*pte_dma_ptr = pte_dma;
On the way change to coherent dma allocation, _wc is only valid on ARM
and was used by mistake.
Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230518131605.650622-5-stanislaw.gruszka@linux.intel.com
Diffstat (limited to 'drivers/accel/ivpu/ivpu_mmu_context.h')
-rw-r--r-- | drivers/accel/ivpu/ivpu_mmu_context.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/accel/ivpu/ivpu_mmu_context.h b/drivers/accel/ivpu/ivpu_mmu_context.h index 29acc1151569..961a0d6a6c7f 100644 --- a/drivers/accel/ivpu/ivpu_mmu_context.h +++ b/drivers/accel/ivpu/ivpu_mmu_context.h @@ -15,10 +15,10 @@ struct ivpu_addr_range; #define IVPU_MMU_PGTABLE_ENTRIES 512ull struct ivpu_mmu_pgtable { - u64 ***pgd_far_entries[IVPU_MMU_PGTABLE_ENTRIES]; - u64 **pgd_cpu_entries[IVPU_MMU_PGTABLE_ENTRIES]; - u64 *pgd_entries[IVPU_MMU_PGTABLE_ENTRIES]; - u64 *pgd; + u64 ***pte_ptrs[IVPU_MMU_PGTABLE_ENTRIES]; + u64 **pmd_ptrs[IVPU_MMU_PGTABLE_ENTRIES]; + u64 *pud_ptrs[IVPU_MMU_PGTABLE_ENTRIES]; + u64 *pgd_dma_ptr; dma_addr_t pgd_dma; }; |