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authorTejun Heo <tj@kernel.org>2013-07-03 06:54:16 +0400
committerTejun Heo <tj@kernel.org>2013-07-03 06:54:16 +0400
commit5a0a6a4f17a3606289f96356383db695a555bdbd (patch)
tree0f8e206d65ef29bf81a13213af00db56c90af06c /drivers/ata/ata_piix.c
parent9bbb1b0e2a83c5b3922a050acc932ee3004e85b6 (diff)
parent1cfc7df3de10c40ed459e13cce6de616023bf41c (diff)
downloadlinux-5a0a6a4f17a3606289f96356383db695a555bdbd.tar.xz
Merge branch 'libata/for-3.10-fixes' into libata/for-3.11
libata/for-3.10-fixes never got submitted during v3.10 cycle. Merge it into for-3.11 so that it can be routed together with other changes scheduled for v3.11. Three trivial conflicts in drivers/ata/sata_rcar.c. All are caused by 1b20f6a9ad ("sata_rcar: add 'base' local variable to some functions") conflicting with logic updates in for-3.10-fixes. The offending commit simply adds local variable @base on functions which dereferences sata_rcar_priv->base multiple times. The resolutions are trivial - applying s/priv->base/base/ in the conflicting logic updates. Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'drivers/ata/ata_piix.c')
-rw-r--r--drivers/ata/ata_piix.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index cab2d3a81e96..b52a10c8eeb9 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -1,7 +1,7 @@
/*
* ata_piix.c - Intel PATA/SATA controllers
*
- * Maintained by: Jeff Garzik <jgarzik@pobox.com>
+ * Maintained by: Tejun Heo <tj@kernel.org>
* Please ALWAYS copy linux-ide@vger.kernel.org
* on emails.
*
@@ -151,6 +151,7 @@ enum piix_controller_ids {
piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
ich8_sata_snb,
ich8_2port_sata_snb,
+ ich8_2port_sata_byt,
};
struct piix_map_db {
@@ -334,6 +335,11 @@ static const struct pci_device_id piix_pci_tbl[] = {
{ 0x8086, 0x8d60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
/* SATA Controller IDE (Wellsburg) */
{ 0x8086, 0x8d68, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
+ /* SATA Controller IDE (BayTrail) */
+ { 0x8086, 0x0F20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
+ { 0x8086, 0x0F21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
+ /* SATA Controller IDE (Coleto Creek) */
+ { 0x8086, 0x23a6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
{ } /* terminate list */
};
@@ -441,6 +447,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
[tolapai_sata] = &tolapai_map_db,
[ich8_sata_snb] = &ich8_map_db,
[ich8_2port_sata_snb] = &ich8_2port_map_db,
+ [ich8_2port_sata_byt] = &ich8_2port_map_db,
};
static struct pci_bits piix_enable_bits[] = {
@@ -1254,6 +1261,16 @@ static struct ata_port_info piix_port_info[] = {
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
+
+ [ich8_2port_sata_byt] =
+ {
+ .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16,
+ .pio_mask = ATA_PIO4,
+ .mwdma_mask = ATA_MWDMA2,
+ .udma_mask = ATA_UDMA6,
+ .port_ops = &piix_sata_ops,
+ },
+
};
#define AHCI_PCI_BAR 5