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authorSudeep Holla <sudeep.holla@arm.com>2022-07-04 13:15:51 +0300
committerSudeep Holla <sudeep.holla@arm.com>2022-07-04 18:22:28 +0300
commitf16d1becf96f0a95dc9e1a5a7f97feeec2b149d5 (patch)
treea33a409fa9824a7887b86324e9ef282587feef5f /drivers/base
parent36bbc5b4ffab33ccac0f4db27f619a6ba7a4fd32 (diff)
downloadlinux-f16d1becf96f0a95dc9e1a5a7f97feeec2b149d5.tar.xz
cacheinfo: Use cache identifiers to check if the caches are shared if available
The cache identifiers is an optional property on most of the platforms. The presence of one must be indicated by the CACHE_ID valid bit in the attributes. We can use the cache identifiers provided by the firmware to check if any two cpus share the same cache instead of relying on the fw_token generated and set in the OS. Link: https://lore.kernel.org/r/20220704101605.1318280-8-sudeep.holla@arm.com Tested-by: Ionela Voinescu <ionela.voinescu@arm.com> Tested-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'drivers/base')
-rw-r--r--drivers/base/cacheinfo.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 4d21a1022fa9..e331b399adeb 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -44,6 +44,10 @@ static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI)))
return !(this_leaf->level == 1);
+ if ((sib_leaf->attributes & CACHE_ID) &&
+ (this_leaf->attributes & CACHE_ID))
+ return sib_leaf->id == this_leaf->id;
+
return sib_leaf->fw_token == this_leaf->fw_token;
}
@@ -56,7 +60,8 @@ bool last_level_cache_is_valid(unsigned int cpu)
llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
- return !!llc->fw_token;
+ return (llc->attributes & CACHE_ID) || !!llc->fw_token;
+
}
bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)