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authorYonglin Tan <yonglin.tan@outlook.com>2022-03-01 19:02:59 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-03-18 16:02:54 +0300
commit2413ffbf19a95cfcd7adf63135c5a9343a66d0a2 (patch)
treece8ef84a76dc21bc937068219095b2752697b802 /drivers/bus
parent824a29ad44b6be1c6ef7cc562f701ce70d020708 (diff)
downloadlinux-2413ffbf19a95cfcd7adf63135c5a9343a66d0a2.tar.xz
bus: mhi: pci_generic: Add mru_default for Quectel EM1xx series
For default mechanism, the driver uses default MRU 3500 if mru_default is not initialized. The Qualcomm configured the MRU size to 32768 in the WWAN device FW. So, we align the driver setting with Qualcomm FW setting. Link: https://lore.kernel.org/r/MEYP282MB2374EE345DADDB591AFDA6AFFD2E9@MEYP282MB2374.AUSP282.PROD.OUTLOOK.COM Fixes: ac4bf60bbaa0 ("bus: mhi: pci_generic: Introduce quectel EM1XXGR-L support") Cc: stable@vger.kernel.org Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Yonglin Tan <yonglin.tan@outlook.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20220301160308.107452-2-manivannan.sadhasivam@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/bus')
-rw-r--r--drivers/bus/mhi/pci_generic.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
index b79895810c52..9527b7d63840 100644
--- a/drivers/bus/mhi/pci_generic.c
+++ b/drivers/bus/mhi/pci_generic.c
@@ -327,6 +327,7 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = {
.config = &modem_quectel_em1xx_config,
.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
.dma_data_width = 32,
+ .mru_default = 32768,
.sideband_wake = true,
};