diff options
| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2023-06-15 12:32:18 +0300 |
|---|---|---|
| committer | Claudiu Beznea <claudiu.beznea@microchip.com> | 2023-06-21 10:42:45 +0300 |
| commit | 00bd581b52f77ea2a51846a4d43d75eccf322cb2 (patch) | |
| tree | a2394c64a0b6d104677a782be243c0c529b8f20e /drivers/clk/at91/clk-generated.c | |
| parent | b5105e377df929dd7d96628122c13e6852f2fe80 (diff) | |
| download | linux-00bd581b52f77ea2a51846a4d43d75eccf322cb2.tar.xz | |
clk: at91: clk-generated: add support for parent_hw
Add support for parent_hw in generic clock drivers.
With this parent-child relation is described with pointers rather
than strings making registration a bit faster.
All the SoC based drivers that rely on clk-generated were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20230615093227.576102-3-claudiu.beznea@microchip.com
Diffstat (limited to 'drivers/clk/at91/clk-generated.c')
| -rw-r--r-- | drivers/clk/at91/clk-generated.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c index 943ea67bf135..4b4edeecc889 100644 --- a/drivers/clk/at91/clk-generated.c +++ b/drivers/clk/at91/clk-generated.c @@ -319,22 +319,29 @@ struct clk_hw * __init at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, const struct clk_pcr_layout *layout, const char *name, const char **parent_names, + struct clk_hw **parent_hws, u32 *mux_table, u8 num_parents, u8 id, const struct clk_range *range, int chg_pid) { struct clk_generated *gck; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *hw; int ret; + if (!(parent_names || parent_hws)) + return ERR_PTR(-ENOMEM); + gck = kzalloc(sizeof(*gck), GFP_KERNEL); if (!gck) return ERR_PTR(-ENOMEM); init.name = name; init.ops = &generated_ops; - init.parent_names = parent_names; + if (parent_hws) + init.parent_hws = (const struct clk_hw **)parent_hws; + else + init.parent_names = parent_names; init.num_parents = num_parents; init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; if (chg_pid >= 0) |