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authorClaudiu Beznea <claudiu.beznea@microchip.com>2020-07-22 10:38:22 +0300
committerStephen Boyd <sboyd@kernel.org>2020-07-24 12:19:08 +0300
commitc57aaaa28cf1a123c0029a36361a809eae2b1960 (patch)
treee86f6ba0836d1fae301984f33961061a49cb36c3 /drivers/clk/at91/pmc.h
parentb4c115c76184f2c56a295579161652fd5eb2dcc1 (diff)
downloadlinux-c57aaaa28cf1a123c0029a36361a809eae2b1960.tar.xz
clk: at91: clk-programmable: add mux_table option
Add mux table option. This is necessary for IP versions that has gaps in the range of available clock sources (e.g. SAMA7G5). Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1595403506-8209-15-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/at91/pmc.h')
-rw-r--r--drivers/clk/at91/pmc.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 34c9506e6275..8d3e22f566cf 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -188,7 +188,8 @@ sam9x60_clk_register_pll(struct regmap *regmap, spinlock_t *lock,
struct clk_hw * __init
at91_clk_register_programmable(struct regmap *regmap, const char *name,
const char **parent_names, u8 num_parents, u8 id,
- const struct clk_programmable_layout *layout);
+ const struct clk_programmable_layout *layout,
+ u32 *mux_table);
struct clk_hw * __init
at91_clk_register_sam9260_slow(struct regmap *regmap,