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authorGabriel Fernandez <gabriel.fernandez@st.com>2019-02-14 13:40:46 +0300
committerStephen Boyd <sboyd@kernel.org>2019-02-22 01:13:21 +0300
commitf9b76fd24d0a0cd7b3d9309b93c36c9c32526b00 (patch)
tree145dfe9820defa28b962869a573aa50b1adf8ef1 /drivers/clk/clk-stm32mp1.c
parentd3f2e33c875de5052e032a9eefa64c897a930ed1 (diff)
downloadlinux-f9b76fd24d0a0cd7b3d9309b93c36c9c32526b00.tar.xz
clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag
The divisor of ethptp_k and ck_hse_rtc clocks is: 'value register plus one'. Then CLK_DIVIDER_ALLOW_ZERO flag has no effect and is useless here. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-stm32mp1.c')
-rw-r--r--drivers/clk/clk-stm32mp1.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index 8958bc11ff05..ca987632564e 100644
--- a/drivers/clk/clk-stm32mp1.c
+++ b/drivers/clk/clk-stm32mp1.c
@@ -1959,11 +1959,10 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
CLK_SET_RATE_NO_REPARENT,
_NO_GATE,
_MMUX(M_ETHCK),
- _DIV(RCC_ETHCKSELR, 4, 4, CLK_DIVIDER_ALLOW_ZERO, NULL)),
+ _DIV(RCC_ETHCKSELR, 4, 4, 0, NULL)),
/* RTC clock */
- DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7,
- CLK_DIVIDER_ALLOW_ZERO),
+ DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7, 0),
COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE |
CLK_SET_RATE_PARENT,