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authorAnson Huang <Anson.Huang@nxp.com>2019-06-19 08:52:44 +0300
committerShawn Guo <shawnguo@kernel.org>2019-08-03 10:16:01 +0300
commit34af5179d239e42698e2aff0be94de2aeac9a733 (patch)
treeb52f077ddac5545125c501d96496fefc378e1b22 /drivers/clk/imx/clk.h
parent1e80936a42e16b7a7c4265de666c472256b7cf36 (diff)
downloadlinux-34af5179d239e42698e2aff0be94de2aeac9a733.tar.xz
clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usage
1416X/1443X PLL are used on i.MX8MM and i.MX8MN and maybe other i.MX8M series SoC later, the macro definitions of these PLLs' initialization should be common for usage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk.h')
-rw-r--r--drivers/clk/imx/clk.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index d94d9cb079d3..19d7b8b0a00e 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -153,6 +153,23 @@ enum imx_pllv3_type {
struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base, u32 div_mask);
+#define PLL_1416X_RATE(_rate, _m, _p, _s) \
+ { \
+ .rate = (_rate), \
+ .mdiv = (_m), \
+ .pdiv = (_p), \
+ .sdiv = (_s), \
+ }
+
+#define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \
+ { \
+ .rate = (_rate), \
+ .mdiv = (_m), \
+ .pdiv = (_p), \
+ .sdiv = (_s), \
+ .kdiv = (_k), \
+ }
+
struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name,
void __iomem *base);