diff options
| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-01-20 12:20:41 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-01-31 03:45:25 +0300 |
| commit | 0f69a423c458f0a6586b7e4ac99e9c2d901ecf56 (patch) | |
| tree | 026b35d73d51001830bcf888831b601606aeb6a7 /drivers/clk/mediatek/clk-mt2701-aud.c | |
| parent | 4c02c9af3cb9449cd176300b288e8addb5083934 (diff) | |
| download | linux-0f69a423c458f0a6586b7e4ac99e9c2d901ecf56.tar.xz | |
clk: mediatek: Switch to mtk_clk_simple_probe() where possible
mtk_clk_simple_probe() is a function that registers mtk gate clocks
and, if reset data is present, a reset controller and across all of
the MTK clock drivers, such a function is duplicated many times:
switch to the common mtk_clk_simple_probe() function for all of the
clock drivers that are registering as platform drivers.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230120092053.182923-12-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt2701-aud.c')
| -rw-r--r-- | drivers/clk/mediatek/clk-mt2701-aud.c | 31 |
1 files changed, 18 insertions, 13 deletions
diff --git a/drivers/clk/mediatek/clk-mt2701-aud.c b/drivers/clk/mediatek/clk-mt2701-aud.c index 263c7075bbcb..1a32d8b7db84 100644 --- a/drivers/clk/mediatek/clk-mt2701-aud.c +++ b/drivers/clk/mediatek/clk-mt2701-aud.c @@ -76,6 +76,7 @@ static const struct mtk_gate_regs audio3_cg_regs = { }; static const struct mtk_gate audio_clks[] = { + GATE_DUMMY(CLK_DUMMY, "aud_dummy"), /* AUDIO0 */ GATE_AUDIO0(CLK_AUD_AFE, "audio_afe", "aud_intbus_sel", 2), GATE_AUDIO0(CLK_AUD_HDMI, "audio_hdmi", "audpll_sel", 20), @@ -138,29 +139,27 @@ static const struct mtk_gate audio_clks[] = { GATE_AUDIO3(CLK_AUD_MEM_ASRC5, "audio_mem_asrc5", "asm_h_sel", 14), }; +static const struct mtk_clk_desc audio_desc = { + .clks = audio_clks, + .num_clks = ARRAY_SIZE(audio_clks), +}; + static const struct of_device_id of_match_clk_mt2701_aud[] = { - { .compatible = "mediatek,mt2701-audsys", }, - {} + { .compatible = "mediatek,mt2701-audsys", .data = &audio_desc }, + { /* sentinel */ } }; static int clk_mt2701_aud_probe(struct platform_device *pdev) { - struct clk_hw_onecell_data *clk_data; - struct device_node *node = pdev->dev.of_node; int r; - clk_data = mtk_alloc_clk_data(CLK_AUD_NR); - - mtk_clk_register_gates(&pdev->dev, node, audio_clks, - ARRAY_SIZE(audio_clks), clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); + r = mtk_clk_simple_probe(pdev); if (r) { dev_err(&pdev->dev, "could not register clock provider: %s: %d\n", pdev->name, r); - goto err_clk_provider; + return r; } r = devm_of_platform_populate(&pdev->dev); @@ -170,13 +169,19 @@ static int clk_mt2701_aud_probe(struct platform_device *pdev) return 0; err_plat_populate: - of_clk_del_provider(node); -err_clk_provider: + mtk_clk_simple_remove(pdev); return r; } +static int clk_mt2701_aud_remove(struct platform_device *pdev) +{ + of_platform_depopulate(&pdev->dev); + return mtk_clk_simple_remove(pdev); +} + static struct platform_driver clk_mt2701_aud_drv = { .probe = clk_mt2701_aud_probe, + .remove = clk_mt2701_aud_remove, .driver = { .name = "clk-mt2701-aud", .of_match_table = of_match_clk_mt2701_aud, |