summaryrefslogtreecommitdiff
path: root/drivers/clk/mediatek/clk-mt2701-mm.c
diff options
context:
space:
mode:
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2023-03-06 17:05:11 +0300
committerStephen Boyd <sboyd@kernel.org>2023-03-13 21:50:15 +0300
commit4c85e20b656607897e3bb06ff565822fa4b4de95 (patch)
tree70c862fa0f44fa11dd88bdbe36caa4753bcd0b04 /drivers/clk/mediatek/clk-mt2701-mm.c
parent3f37ba7cc385ba07762ffcd7ac38af8c0f84dd3e (diff)
downloadlinux-4c85e20b656607897e3bb06ff565822fa4b4de95.tar.xz
clk: mediatek: Consistently use GATE_MTK() macro
All the various MediaTek clock drivers are, in a way or another, redefining the GATE_MTK() macro with different names: while some are doing that by actually using GATE_MTK(), others are copying it entirely (hence, entirely redefining it). Change all clock drivers to always and consistently use this macro. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Chen-Yu Tsai <wenst@chromium.org> # MT8183, MT8192, MT8195 Chromebooks Link: https://lore.kernel.org/r/20230306140543.1813621-23-angelogioacchino.delregno@collabora.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt2701-mm.c')
-rw-r--r--drivers/clk/mediatek/clk-mt2701-mm.c20
1 files changed, 4 insertions, 16 deletions
diff --git a/drivers/clk/mediatek/clk-mt2701-mm.c b/drivers/clk/mediatek/clk-mt2701-mm.c
index a8d94ca0eefd..993d904d619f 100644
--- a/drivers/clk/mediatek/clk-mt2701-mm.c
+++ b/drivers/clk/mediatek/clk-mt2701-mm.c
@@ -24,23 +24,11 @@ static const struct mtk_gate_regs disp1_cg_regs = {
.sta_ofs = 0x0110,
};
-#define GATE_DISP0(_id, _name, _parent, _shift) { \
- .id = _id, \
- .name = _name, \
- .parent_name = _parent, \
- .regs = &disp0_cg_regs, \
- .shift = _shift, \
- .ops = &mtk_clk_gate_ops_setclr, \
- }
+#define GATE_DISP0(_id, _name, _parent, _shift) \
+ GATE_MTK(_id, _name, _parent, &disp0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
-#define GATE_DISP1(_id, _name, _parent, _shift) { \
- .id = _id, \
- .name = _name, \
- .parent_name = _parent, \
- .regs = &disp1_cg_regs, \
- .shift = _shift, \
- .ops = &mtk_clk_gate_ops_setclr, \
- }
+#define GATE_DISP1(_id, _name, _parent, _shift) \
+ GATE_MTK(_id, _name, _parent, &disp1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
static const struct mtk_gate mm_clks[] = {
GATE_DISP0(CLK_MM_SMI_COMMON, "mm_smi_comm", "mm_sel", 0),