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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2023-01-20 12:20:35 +0300
committerStephen Boyd <sboyd@kernel.org>2023-01-31 03:45:06 +0300
commit01a6c1ab57c3a474c8d23c7d82c3fcce85f62612 (patch)
tree7c7dcb2b66566bd3b60ea46d36d90aba33e88693 /drivers/clk/mediatek/clk-mt8135.c
parentf0b3140f4b81bd8e886f534d9eda43ff5d3382a9 (diff)
downloadlinux-01a6c1ab57c3a474c8d23c7d82c3fcce85f62612.tar.xz
clk: mediatek: clk-mtk: Propagate struct device for composites
Like done for cpumux clocks, propagate struct device for composite clocks registered through clk-mtk helpers to be able to get runtime pm support for MTK clocks. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20230120092053.182923-6-angelogioacchino.delregno@collabora.com Tested-by: Mingming Su <mingming.su@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt8135.c')
-rw-r--r--drivers/clk/mediatek/clk-mt8135.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/clk/mediatek/clk-mt8135.c b/drivers/clk/mediatek/clk-mt8135.c
index 05963fd76ee9..2b9c925c2a2b 100644
--- a/drivers/clk/mediatek/clk-mt8135.c
+++ b/drivers/clk/mediatek/clk-mt8135.c
@@ -548,8 +548,9 @@ static void __init mtk_topckgen_init(struct device_node *node)
mtk_clk_register_factors(root_clk_alias, ARRAY_SIZE(root_clk_alias), clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
- &mt8135_clk_lock, clk_data);
+ mtk_clk_register_composites(NULL, top_muxes,
+ ARRAY_SIZE(top_muxes), base,
+ &mt8135_clk_lock, clk_data);
clk_prepare_enable(clk_data->hws[CLK_TOP_CCI_SEL]->clk);
@@ -597,8 +598,9 @@ static void __init mtk_pericfg_init(struct device_node *node)
mtk_clk_register_gates(NULL, node, peri_gates,
ARRAY_SIZE(peri_gates), clk_data);
- mtk_clk_register_composites(peri_clks, ARRAY_SIZE(peri_clks), base,
- &mt8135_clk_lock, clk_data);
+ mtk_clk_register_composites(NULL, peri_clks,
+ ARRAY_SIZE(peri_clks), base,
+ &mt8135_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)