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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2023-03-06 17:05:07 +0300
committerStephen Boyd <sboyd@kernel.org>2023-03-13 21:50:14 +0300
commitbeb47f1942071b43bec84adc2fbd94e866953032 (patch)
tree3ff9046381bf3490459788f02716fe5b4ba7d232 /drivers/clk/mediatek/clk-mt8167-vdec.c
parentb4bd678f27e24e5c7cb7ad87829a2f7d724fc5bb (diff)
downloadlinux-beb47f1942071b43bec84adc2fbd94e866953032.tar.xz
clk: mediatek: mt8167: Convert to mtk_clk_simple_{probe,remove}()
Convert topckgen and infracfg clock drivers to use the common mtk_clk_simple_probe() mechanism and change this from the old "static" CLK_OF_DECLARE to be a platform driver, allowing it to eventually be built as a module. Thanks to the conversion, more error handling was added to the clocks registration. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20230306140543.1813621-19-angelogioacchino.delregno@collabora.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt8167-vdec.c')
-rw-r--r--drivers/clk/mediatek/clk-mt8167-vdec.c33
1 files changed, 17 insertions, 16 deletions
diff --git a/drivers/clk/mediatek/clk-mt8167-vdec.c b/drivers/clk/mediatek/clk-mt8167-vdec.c
index 905529789a7c..c3e2253a57d7 100644
--- a/drivers/clk/mediatek/clk-mt8167-vdec.c
+++ b/drivers/clk/mediatek/clk-mt8167-vdec.c
@@ -54,21 +54,22 @@ static const struct mtk_gate vdec_clks[] = {
GATE_VDEC1_I(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "smi_mm", 0),
};
-static void __init mtk_vdecsys_init(struct device_node *node)
-{
- struct clk_hw_onecell_data *clk_data;
- int r;
-
- clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK);
-
- mtk_clk_register_gates(NULL, node, vdec_clks, ARRAY_SIZE(vdec_clks),
- clk_data);
-
- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+static const struct mtk_clk_desc vdec_desc = {
+ .clks = vdec_clks,
+ .num_clks = ARRAY_SIZE(vdec_clks),
+};
- if (r)
- pr_err("%s(): could not register clock provider: %d\n",
- __func__, r);
+static const struct of_device_id of_match_clk_mt8167_vdec[] = {
+ { .compatible = "mediatek,mt8167-vdecsys", .data = &vdec_desc },
+ { /* sentinel */ }
+};
-}
-CLK_OF_DECLARE(mtk_vdecsys, "mediatek,mt8167-vdecsys", mtk_vdecsys_init);
+static struct platform_driver clk_mt8167_vdec_drv = {
+ .probe = mtk_clk_simple_probe,
+ .remove = mtk_clk_simple_remove,
+ .driver = {
+ .name = "clk-mt8167-vdecsys",
+ .of_match_table = of_match_clk_mt8167_vdec,
+ },
+};
+module_platform_driver(clk_mt8167_vdec_drv);