diff options
| author | Matthias Brugger <matthias.bgg@gmail.com> | 2022-05-23 13:23:39 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-06-10 01:45:27 +0300 |
| commit | 1b83ad93ecfd30ca33c6b16414e2f440fe88dfaa (patch) | |
| tree | af101d2cfb87ac5dbf8ca87c9b90eb7f63fb7704 /drivers/clk/mediatek/clk-mt8192-msdc.c | |
| parent | 1be3b43a5828839697ee53ab3273ecc71ceeaffe (diff) | |
| download | linux-1b83ad93ecfd30ca33c6b16414e2f440fe88dfaa.tar.xz | |
clk: mediatek: Delete MT8192 msdc gate
The msdc gate is part of the MMC driver. Delete the not used code.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220523102339.21927-3-matthias.bgg@kernel.org
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt8192-msdc.c')
| -rw-r--r-- | drivers/clk/mediatek/clk-mt8192-msdc.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/drivers/clk/mediatek/clk-mt8192-msdc.c b/drivers/clk/mediatek/clk-mt8192-msdc.c index 87c3b79b79cf..635f7a0b629a 100644 --- a/drivers/clk/mediatek/clk-mt8192-msdc.c +++ b/drivers/clk/mediatek/clk-mt8192-msdc.c @@ -12,28 +12,15 @@ #include <dt-bindings/clock/mt8192-clk.h> -static const struct mtk_gate_regs msdc_cg_regs = { - .set_ofs = 0xb4, - .clr_ofs = 0xb4, - .sta_ofs = 0xb4, -}; - static const struct mtk_gate_regs msdc_top_cg_regs = { .set_ofs = 0x0, .clr_ofs = 0x0, .sta_ofs = 0x0, }; -#define GATE_MSDC(_id, _name, _parent, _shift) \ - GATE_MTK(_id, _name, _parent, &msdc_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv) - #define GATE_MSDC_TOP(_id, _name, _parent, _shift) \ GATE_MTK(_id, _name, _parent, &msdc_top_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv) -static const struct mtk_gate msdc_clks[] = { - GATE_MSDC(CLK_MSDC_AXI_WRAP, "msdc_axi_wrap", "axi_sel", 22), -}; - static const struct mtk_gate msdc_top_clks[] = { GATE_MSDC_TOP(CLK_MSDC_TOP_AES_0P, "msdc_top_aes_0p", "aes_msdcfde_sel", 0), GATE_MSDC_TOP(CLK_MSDC_TOP_SRC_0P, "msdc_top_src_0p", "infra_msdc0_src", 1), @@ -52,11 +39,6 @@ static const struct mtk_gate msdc_top_clks[] = { GATE_MSDC_TOP(CLK_MSDC_TOP_AHB2AXI_BRG_AXI, "msdc_top_ahb2axi_brg_axi", "axi_sel", 14), }; -static const struct mtk_clk_desc msdc_desc = { - .clks = msdc_clks, - .num_clks = ARRAY_SIZE(msdc_clks), -}; - static const struct mtk_clk_desc msdc_top_desc = { .clks = msdc_top_clks, .num_clks = ARRAY_SIZE(msdc_top_clks), @@ -64,9 +46,6 @@ static const struct mtk_clk_desc msdc_top_desc = { static const struct of_device_id of_match_clk_mt8192_msdc[] = { { - .compatible = "mediatek,mt8192-msdc", - .data = &msdc_desc, - }, { .compatible = "mediatek,mt8192-msdc_top", .data = &msdc_top_desc, }, { |