diff options
| author | Dmitry Rokosov <ddrokosov@sberdevices.ru> | 2023-05-23 16:53:49 +0300 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2023-05-30 18:53:05 +0300 |
| commit | 28f3be518081b2127f98105fa9735a19812a33ca (patch) | |
| tree | aa29c096e6791cf7a1c0894e0cae1b64118e9a0c /drivers/clk/meson/Makefile | |
| parent | b6ec400aa153b27e056b2dfc5e830b724c053a04 (diff) | |
| download | linux-28f3be518081b2127f98105fa9735a19812a33ca.tar.xz | |
clk: meson: a1: add Amlogic A1 PLL clock controller driver
Introduce PLL clock controller for Amlogic A1 SoC family.
The clock unit is an APB slave module that is designed for generating all
of the internal and system clocks.
The SoC uses an external 24MHz crystal; there are 4 internal PLLs:
SYS_PLL/HIFI_PLL/USB_PLL/(FIXPLL), these PLLs generate 27 clock sources.
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230523135351.19133-5-ddrokosov@sberdevices.ru
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/Makefile')
| -rw-r--r-- | drivers/clk/meson/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 6eca2a406ee3..2f17f475a48f 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o obj-$(CONFIG_COMMON_CLK_AXG) += axg.o axg-aoclk.o obj-$(CONFIG_COMMON_CLK_AXG_AUDIO) += axg-audio.o +obj-$(CONFIG_COMMON_CLK_A1_PLL) += a1-pll.o obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o obj-$(CONFIG_COMMON_CLK_G12A) += g12a.o g12a-aoclk.o obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o meson8-ddr.o |