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authorRussell King <rmk+kernel@arm.linux.org.uk>2015-12-08 13:38:05 +0300
committerMichael Turquette <mturquette@baylibre.com>2015-12-22 23:25:00 +0300
commit63b8d92c793f8622227f70b0685a356d47178cfa (patch)
tree327189e7cda6775e72a1ddc7ea0ded6d3dec2af4 /drivers/clk/mvebu/dove.c
parent8005c49d9aea74d382f474ce11afbbc7d7130bec (diff)
downloadlinux-63b8d92c793f8622227f70b0685a356d47178cfa.tar.xz
clk: add Dove PLL divider support for GPU, VMeta and AXI clocks
Add support for the Dove PLL dividers, which are used to generate the clocks for the AXI bus, as well as the GPU and VMeta peripherals. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Diffstat (limited to 'drivers/clk/mvebu/dove.c')
-rw-r--r--drivers/clk/mvebu/dove.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/mvebu/dove.c b/drivers/clk/mvebu/dove.c
index b8c2424ac926..59fad9546c84 100644
--- a/drivers/clk/mvebu/dove.c
+++ b/drivers/clk/mvebu/dove.c
@@ -17,6 +17,7 @@
#include <linux/io.h>
#include <linux/of.h>
#include "common.h"
+#include "dove-divider.h"
/*
* Core Clocks
@@ -184,9 +185,14 @@ static void __init dove_clk_init(struct device_node *np)
{
struct device_node *cgnp =
of_find_compatible_node(NULL, NULL, "marvell,dove-gating-clock");
+ struct device_node *ddnp =
+ of_find_compatible_node(NULL, NULL, "marvell,dove-divider-clock");
mvebu_coreclk_setup(np, &dove_coreclks);
+ if (ddnp)
+ dove_divider_clk_init(ddnp);
+
if (cgnp)
mvebu_clk_gating_setup(cgnp, dove_gating_desc);
}