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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-07-04 20:24:51 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2022-08-29 23:42:54 +0300 |
| commit | 52a0a6cb49f73801e43dfce17d8d075625d20294 (patch) | |
| tree | fdfeeb142a071eceb81b5d9edc1afd653ce9e336 /drivers/clk/qcom/gcc-msm8916.c | |
| parent | 69da4290a9ed1607f148b552ca1bd073e07d7697 (diff) | |
| download | linux-52a0a6cb49f73801e43dfce17d8d075625d20294.tar.xz | |
clk: qcom: gcc-msm8916: move gcc_mss_q6_bimc_axi_clk down
The gcc_mss_q6_bimc_axi_clk clock depends on the bimc_ddr_clk_src clock.
Move it down in the file to come after the source clock.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220704172453.838303-6-dmitry.baryshkov@linaro.org
Diffstat (limited to 'drivers/clk/qcom/gcc-msm8916.c')
| -rw-r--r-- | drivers/clk/qcom/gcc-msm8916.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c index 1a6f5eb09d06..f965cde0e8d5 100644 --- a/drivers/clk/qcom/gcc-msm8916.c +++ b/drivers/clk/qcom/gcc-msm8916.c @@ -2629,23 +2629,6 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = { }, }; -static struct clk_branch gcc_mss_q6_bimc_axi_clk = { - .halt_reg = 0x49004, - .clkr = { - .enable_reg = 0x49004, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "gcc_mss_q6_bimc_axi_clk", - .parent_names = (const char *[]){ - "bimc_ddr_clk_src", - }, - .num_parents = 1, - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_oxili_ahb_clk = { .halt_reg = 0x59028, .clkr = { @@ -2812,6 +2795,23 @@ static struct clk_rcg2 bimc_ddr_clk_src = { }, }; +static struct clk_branch gcc_mss_q6_bimc_axi_clk = { + .halt_reg = 0x49004, + .clkr = { + .enable_reg = 0x49004, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_q6_bimc_axi_clk", + .parent_names = (const char *[]){ + "bimc_ddr_clk_src", + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_apss_tcu_clk = { .halt_reg = 0x12018, .clkr = { |