summaryrefslogtreecommitdiff
path: root/drivers/clk/qcom/gcc-sc8280xp.c
diff options
context:
space:
mode:
authorJohan Hovold <johan+linaro@kernel.org>2022-05-20 13:09:48 +0300
committerBjorn Andersson <bjorn.andersson@linaro.org>2022-06-26 06:38:02 +0300
commit8d114b94fc39210b88b203b57aaf04836a87a4f0 (patch)
treea78a7ab8a3d8eb658ddd6f74f94eb7874bce80cf /drivers/clk/qcom/gcc-sc8280xp.c
parent77ea2bd72da4f61f59ad2e839babe83849f35dea (diff)
downloadlinux-8d114b94fc39210b88b203b57aaf04836a87a4f0.tar.xz
clk: qcom: gcc-sc8280xp: use collapse-voting for PCIe GDSCs
The PCIe GDSCs can be shared with other masters and should use the APCS collapse-vote register when updating the power state. This is specifically also needed to be able to disable power domains that have been enabled by boot firmware using the vote register. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220520100948.19622-4-johan+linaro@kernel.org
Diffstat (limited to 'drivers/clk/qcom/gcc-sc8280xp.c')
-rw-r--r--drivers/clk/qcom/gcc-sc8280xp.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
index 4b894442fdf5..f186ddf6954e 100644
--- a/drivers/clk/qcom/gcc-sc8280xp.c
+++ b/drivers/clk/qcom/gcc-sc8280xp.c
@@ -6807,58 +6807,79 @@ static struct clk_branch gcc_video_vcodec_throttle_clk = {
static struct gdsc pcie_0_tunnel_gdsc = {
.gdscr = 0xa4004,
+ .collapse_ctrl = 0x52128,
+ .collapse_mask = BIT(0),
.pd = {
.name = "pcie_0_tunnel_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
};
static struct gdsc pcie_1_tunnel_gdsc = {
.gdscr = 0x8d004,
+ .collapse_ctrl = 0x52128,
+ .collapse_mask = BIT(1),
.pd = {
.name = "pcie_1_tunnel_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
};
static struct gdsc pcie_2a_gdsc = {
.gdscr = 0x9d004,
+ .collapse_ctrl = 0x52128,
+ .collapse_mask = BIT(2),
.pd = {
.name = "pcie_2a_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
};
static struct gdsc pcie_2b_gdsc = {
.gdscr = 0x9e004,
+ .collapse_ctrl = 0x52128,
+ .collapse_mask = BIT(3),
.pd = {
.name = "pcie_2b_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
};
static struct gdsc pcie_3a_gdsc = {
.gdscr = 0xa0004,
+ .collapse_ctrl = 0x52128,
+ .collapse_mask = BIT(4),
.pd = {
.name = "pcie_3a_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
};
static struct gdsc pcie_3b_gdsc = {
.gdscr = 0xa2004,
+ .collapse_ctrl = 0x52128,
+ .collapse_mask = BIT(5),
.pd = {
.name = "pcie_3b_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
};
static struct gdsc pcie_4_gdsc = {
.gdscr = 0x6b004,
+ .collapse_ctrl = 0x52128,
+ .collapse_mask = BIT(6),
.pd = {
.name = "pcie_4_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = VOTABLE,
};
static struct gdsc ufs_card_gdsc = {