diff options
| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-08-09 22:20:27 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-09-20 15:40:33 +0300 |
| commit | 9906c4140897bbdbff7bb71c6ae67903cb9954ce (patch) | |
| tree | 777ee7699f4835b3d65ace06f92c93e4d9f8aab3 /drivers/clk/qcom/mmcc-msm8998.c | |
| parent | f7b7d30158cff246667273bd2a62fc93ee0725d2 (diff) | |
| download | linux-9906c4140897bbdbff7bb71c6ae67903cb9954ce.tar.xz | |
clk: qcom: mmcc-msm8998: Don't check halt bit on some branch clks
Some branch clocks are governed externally and we're only supposed to
send a request concerning their shutdown, not actually ensure it happens.
Use the BRANCH_HALT_SKIP define to skip checking the halt bit.
Fixes: d14b15b5931c ("clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver")
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-4-ba1b1fd9ee75@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/mmcc-msm8998.c')
| -rw-r--r-- | drivers/clk/qcom/mmcc-msm8998.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm8998.c index a023c4374be9..b0b51adb73a5 100644 --- a/drivers/clk/qcom/mmcc-msm8998.c +++ b/drivers/clk/qcom/mmcc-msm8998.c @@ -2439,6 +2439,7 @@ static struct clk_branch fd_ahb_clk = { static struct clk_branch mnoc_ahb_clk = { .halt_reg = 0x5024, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x5024, .enable_mask = BIT(0), @@ -2454,6 +2455,7 @@ static struct clk_branch mnoc_ahb_clk = { static struct clk_branch bimc_smmu_ahb_clk = { .halt_reg = 0xe004, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0xe004, .hwcg_bit = 1, .clkr = { @@ -2471,6 +2473,7 @@ static struct clk_branch bimc_smmu_ahb_clk = { static struct clk_branch bimc_smmu_axi_clk = { .halt_reg = 0xe008, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0xe008, .hwcg_bit = 1, .clkr = { |