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authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>2023-10-06 13:39:59 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2023-10-10 10:29:48 +0300
commitde60a3ebe410670ffdbbc95faa25a820da44ab11 (patch)
treeda8d3bd91aaf1a7c5f96bc04052bb7f86ea48eaf /drivers/clk/renesas/rzg2l-cpg.c
parenta96aed0636d49f39e4c9eb85ef7c8630e12e3421 (diff)
downloadlinux-de60a3ebe410670ffdbbc95faa25a820da44ab11.tar.xz
clk: renesas: Add minimal boot support for RZ/G3S SoC
Add minimal clock and reset support for the RZ/G3S SoC to be able to boot Linux from SD Card/eMMC. This includes necessary core clocks for booting and GIC, SCIF, GPIO, and SD0 module clocks and resets. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231006103959.197485-5-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/rzg2l-cpg.c')
-rw-r--r--drivers/clk/renesas/rzg2l-cpg.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index 49dc6c5c0b0c..d62f1bc1f60e 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -1706,6 +1706,12 @@ static const struct of_device_id rzg2l_cpg_match[] = {
.data = &r9a07g054_cpg_info,
},
#endif
+#ifdef CONFIG_CLK_R9A08G045
+ {
+ .compatible = "renesas,r9a08g045-cpg",
+ .data = &r9a08g045_cpg_info,
+ },
+#endif
#ifdef CONFIG_CLK_R9A09G011
{
.compatible = "renesas,r9a09g011-cpg",