diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-07 16:10:02 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-26 13:38:01 +0300 |
| commit | ceb22d9312b3dcb3568da7ab0d62aea8b8bf0a15 (patch) | |
| tree | 8f1e4cc66c096f9be2faf326c404a3142c78fab0 /drivers/clk/renesas | |
| parent | f5684bde0375f4feb2a9ed1c146df29437652e70 (diff) | |
| download | linux-ceb22d9312b3dcb3568da7ab0d62aea8b8bf0a15.tar.xz | |
clk: renesas: r8a779g0: Add SCIF clocks
Add the module clocks used by the Serial Communication Interfaces with
FIFO (SCIF) on the Renesas R-Car V4H (R8A779G0) SoC.
Based on a larger patch in the BSP by Kazuya Mizuguchi.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/a6ab466cfdac377106494c00b811a60151cb1825.1665147497.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/r8a779g0-cpg-mssr.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index f1f0496f7605..c8c143c31b2b 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -175,6 +175,10 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { DEF_MOD("msi3", 621, R8A779G0_CLK_MSO), DEF_MOD("msi4", 622, R8A779G0_CLK_MSO), DEF_MOD("msi5", 623, R8A779G0_CLK_MSO), + DEF_MOD("scif0", 702, R8A779G0_CLK_SASYNCPERD4), + DEF_MOD("scif1", 703, R8A779G0_CLK_SASYNCPERD4), + DEF_MOD("scif3", 704, R8A779G0_CLK_SASYNCPERD4), + DEF_MOD("scif4", 705, R8A779G0_CLK_SASYNCPERD4), DEF_MOD("sydm0", 709, R8A779G0_CLK_S0D6_PER), DEF_MOD("sydm1", 710, R8A779G0_CLK_S0D6_PER), DEF_MOD("wdt1:wdt0", 907, R8A779G0_CLK_R), |