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authorRamesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>2016-10-13 12:31:48 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2016-11-02 22:39:55 +0300
commitcf31bc71c0f8cdf9c6529ff49b4928ea27b652e2 (patch)
treebd1546c863dba2a4a4be1b4177cd23f2de25f136 /drivers/clk/renesas
parentbc4725d9029e2c8205fbaf1105e193d1c4e463bb (diff)
downloadlinux-cf31bc71c0f8cdf9c6529ff49b4928ea27b652e2.tar.xz
clk: renesas: r8a7796: Add DRIF clock
This patch adds DRIF module clocks for r8a7796 SoC. Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas')
-rw-r--r--drivers/clk/renesas/r8a7796-cpg-mssr.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index f0302fba948e..f2f56e16a7cf 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -128,6 +128,14 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
DEF_MOD("sdif0", 314, R8A7796_CLK_SD0),
DEF_MOD("rwdt0", 402, R8A7796_CLK_R),
DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1),
+ DEF_MOD("drif7", 508, R8A7796_CLK_S3D2),
+ DEF_MOD("drif6", 509, R8A7796_CLK_S3D2),
+ DEF_MOD("drif5", 510, R8A7796_CLK_S3D2),
+ DEF_MOD("drif4", 511, R8A7796_CLK_S3D2),
+ DEF_MOD("drif3", 512, R8A7796_CLK_S3D2),
+ DEF_MOD("drif2", 513, R8A7796_CLK_S3D2),
+ DEF_MOD("drif1", 514, R8A7796_CLK_S3D2),
+ DEF_MOD("drif0", 515, R8A7796_CLK_S3D2),
DEF_MOD("hscif4", 516, R8A7796_CLK_S3D1),
DEF_MOD("hscif3", 517, R8A7796_CLK_S3D1),
DEF_MOD("hscif2", 518, R8A7796_CLK_S3D1),