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authorChen-Yu Tsai <wens@csie.org>2019-01-25 06:23:04 +0300
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-01-25 12:43:44 +0300
commit108a459ef4cd17a28711d81092044e597b5c7618 (patch)
treea7eacb3ae3b6d9776616956f2e4221f4ee60e219 /drivers/clk/sunxi-ng
parentbfeffd155283772bbe78c6a05dec7c0128ee500c (diff)
downloadlinux-108a459ef4cd17a28711d81092044e597b5c7618.tar.xz
clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it
The PLL-MIPI clock is somewhat special as it has its own LDOs which need to be turned on for this PLL to actually work and output a clock signal. Add the 2 LDO enable bits to the gate bits. Fixes: 5690879d93e8 ("clk: sunxi-ng: Add A23 CCU") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'drivers/clk/sunxi-ng')
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun8i-a23.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
index a4fa2945f230..4b5f8f4e4ab8 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
@@ -144,7 +144,7 @@ static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_mipi_clk, "pll-mipi",
8, 4, /* N */
4, 2, /* K */
0, 4, /* M */
- BIT(31), /* gate */
+ BIT(31) | BIT(23) | BIT(22), /* gate */
BIT(28), /* lock */
CLK_SET_RATE_UNGATE);