diff options
author | Tony Lindgren <tony@atomide.com> | 2024-02-13 13:48:52 +0300 |
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committer | Tony Lindgren <tony@atomide.com> | 2024-02-26 14:08:45 +0300 |
commit | 4a5917cd504c7afd5e9de7166eb710687a9b026f (patch) | |
tree | ff7c9450aa2db9af0cd887820ba1157708239158 /drivers/clk/ti/apll.c | |
parent | 3516338543cafb658cbd235038c0047d2a8f3068 (diff) | |
download | linux-4a5917cd504c7afd5e9de7166eb710687a9b026f.tar.xz |
clk: ti: Improve clksel clock bit parsing for reg property
Because of legacy reasons, the TI clksel composite clocks can have
overlapping reg properties, and use a custom ti,bit-shift property.
For the clksel clocks we can start using of the standard reg property
instead of the custom ti,bit-shift property.
To do this, let's add a ti_clk_get_legacy_bit_shift() helper, and make
ti_clk_get_reg_addr() populate the clock bit offset.
This makes it possible to update the devicetree files to use the reg
property one clock at a time.
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/clk/ti/apll.c')
-rw-r--r-- | drivers/clk/ti/apll.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c index 93183287c58d..43514e6f3b78 100644 --- a/drivers/clk/ti/apll.c +++ b/drivers/clk/ti/apll.c @@ -376,14 +376,9 @@ static void __init of_omap2_apll_setup(struct device_node *node) } clk_hw->fixed_rate = val; - if (of_property_read_u32(node, "ti,bit-shift", &val)) { - pr_err("%pOFn missing bit-shift\n", node); - goto cleanup; - } - - clk_hw->enable_bit = val; - ad->enable_mask = 0x3 << val; - ad->autoidle_mask = 0x3 << val; + clk_hw->enable_bit = ti_clk_get_legacy_bit_shift(node); + ad->enable_mask = 0x3 << clk_hw->enable_bit; + ad->autoidle_mask = 0x3 << clk_hw->enable_bit; if (of_property_read_u32(node, "ti,idlest-shift", &val)) { pr_err("%pOFn missing idlest-shift\n", node); |