diff options
| author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-04-14 14:06:35 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-07-19 17:21:51 +0300 |
| commit | 203ab7670432fba3fe74e61b119aaac0f00624dd (patch) | |
| tree | 5b431badeaba93df47874542288b86c3c06a9934 /drivers/clk | |
| parent | b80c4629e966ec6df3faa10984ebd22f9fb537b1 (diff) | |
| download | linux-203ab7670432fba3fe74e61b119aaac0f00624dd.tar.xz | |
clk: qcom: dispcc-qcm2290: Fix BI_TCXO_AO handling
[ Upstream commit 92dfee0fc889b5b00ffb6b1de87ce64c483bcb7b ]
BI_TCXO_AO (.fw_name = "bi_tcxo_ao") was previously made to reuse the
same parent enum entry as BI_TCXO (.fw_name = "bi_tcxo") in parent_map_2.
Resolve it by introducing its own entry in the parent enum and
correctly assigning it in disp_cc_parent_map_2[].
Fixes: cc517ea3333f ("clk: qcom: Add display clock controller driver for QCM2290")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230412-topic-qcm_dispcc-v2-1-bce7dd512fe4@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/qcom/dispcc-qcm2290.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c index 24755dc841f9..4a4993470852 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -23,6 +23,7 @@ enum { P_BI_TCXO, + P_BI_TCXO_AO, P_DISP_CC_PLL0_OUT_MAIN, P_DSI0_PHY_PLL_OUT_BYTECLK, P_DSI0_PHY_PLL_OUT_DSICLK, @@ -81,7 +82,7 @@ static const struct clk_parent_data disp_cc_parent_data_1[] = { }; static const struct parent_map disp_cc_parent_map_2[] = { - { P_BI_TCXO, 0 }, + { P_BI_TCXO_AO, 0 }, { P_GPLL0_OUT_MAIN, 4 }, }; @@ -150,7 +151,7 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = { }; static const struct freq_tbl ftbl_disp_cc_mdss_ahb_clk_src[] = { - F(19200000, P_BI_TCXO, 1, 0, 0), + F(19200000, P_BI_TCXO_AO, 1, 0, 0), F(37500000, P_GPLL0_OUT_MAIN, 8, 0, 0), F(75000000, P_GPLL0_OUT_MAIN, 4, 0, 0), { } |