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author | Alberto Panizzo <alberto@amarulasolutions.com> | 2018-07-06 16:18:51 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-09-05 10:26:42 +0300 |
commit | 2adc2541a5c4fc431350192a32198f5f90c2fe17 (patch) | |
tree | 81b90a0d1b8d15ec6e7308c8d195dfca099f9e8f /drivers/clk | |
parent | ae302d685162f13ba3ab9e1403dc1bdbccb8cec5 (diff) | |
download | linux-2adc2541a5c4fc431350192a32198f5f90c2fe17.tar.xz |
clk: rockchip: fix clk_i2sout parent selection bits on rk3399
commit a64ad008980c65d38e6cf6858429c78e6b740c41 upstream.
Register, shift and mask were wrong according to datasheet.
Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399")
Cc: stable@vger.kernel.org
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/rockchip/clk-rk3399.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index 6847120b61cd..62d0a69f8da0 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -630,7 +630,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { MUX(0, "clk_i2sout_src", mux_i2sch_p, CLK_SET_RATE_PARENT, RK3399_CLKSEL_CON(31), 0, 2, MFLAGS), COMPOSITE_NODIV(SCLK_I2S_8CH_OUT, "clk_i2sout", mux_i2sout_p, CLK_SET_RATE_PARENT, - RK3399_CLKSEL_CON(30), 8, 2, MFLAGS, + RK3399_CLKSEL_CON(31), 2, 1, MFLAGS, RK3399_CLKGATE_CON(8), 12, GFLAGS), /* uart */ |