diff options
| author | Ondrej Jirman <megous@megous.com> | 2019-06-04 18:40:36 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-01-27 16:50:53 +0300 |
| commit | e252889cd7023c8eeea0b7920f0be8ceaaf8e145 (patch) | |
| tree | 7f5a507175052ea9bc0a19a16db441eb7be91e51 /drivers/clk | |
| parent | 9232a39de09da4d064324a217c3a367676b76be7 (diff) | |
| download | linux-e252889cd7023c8eeea0b7920f0be8ceaaf8e145.tar.xz | |
clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register
[ Upstream commit f167675486c37b88620d344fbb12d06e34f11d47 ]
The current code defines W1 clock gate to be at 0x1cc, overlaying it
with the IR gate.
Clock gate for r-apb1-w1 is at 0x1ec. This fixes issues with IR receiver
causing interrupt floods on H6 (because interrupt flags can't be cleared,
due to IR module's bus being disabled).
Fixes: b7c7b05065aa77ae ("clk: sunxi-ng: add support for H6 PRCM CCU")
Signed-off-by: Ondrej Jirman <megous@megous.com>
Acked-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c index 27554eaf6929..8d05d4f1f8a1 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c @@ -104,7 +104,7 @@ static SUNXI_CCU_GATE(r_apb2_i2c_clk, "r-apb2-i2c", "r-apb2", static SUNXI_CCU_GATE(r_apb1_ir_clk, "r-apb1-ir", "r-apb1", 0x1cc, BIT(0), 0); static SUNXI_CCU_GATE(r_apb1_w1_clk, "r-apb1-w1", "r-apb1", - 0x1cc, BIT(0), 0); + 0x1ec, BIT(0), 0); /* Information of IR(RX) mod clock is gathered from BSP source code */ static const char * const r_mod0_default_parents[] = { "osc32k", "osc24M" }; |