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author | Serge Semin <Sergey.Semin@baikalelectronics.ru> | 2022-09-30 01:53:56 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-10-26 14:25:39 +0300 |
commit | 823fd523912ff4fc8edf2a2ac93f57329c90f36e (patch) | |
tree | 78d3c4b2e1293416bd5e8d7107a8a6445d130ac9 /drivers/clk | |
parent | 2f19a1050e1b2e63c326550a92f884f79c2f089f (diff) | |
download | linux-823fd523912ff4fc8edf2a2ac93f57329c90f36e.tar.xz |
clk: baikal-t1: Fix invalid xGMAC PTP clock divider
[ Upstream commit 3c742088686ce922704aec5b11d09bcc5a396589 ]
Most likely due to copy-paste mistake the divider has been set to 10 while
according to the SoC reference manual it's supposed to be 8 thus having
PTP clock frequency of 156.25 MHz.
Fixes: 353afa3a8d2e ("clk: Add Baikal-T1 CCU Dividers driver")
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20220929225402.9696-3-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/baikal-t1/clk-ccu-div.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/baikal-t1/clk-ccu-div.c b/drivers/clk/baikal-t1/clk-ccu-div.c index f141fda12b09..ea77eec40ddd 100644 --- a/drivers/clk/baikal-t1/clk-ccu-div.c +++ b/drivers/clk/baikal-t1/clk-ccu-div.c @@ -207,7 +207,7 @@ static const struct ccu_div_info sys_info[] = { CCU_DIV_GATE_INFO(CCU_SYS_XGMAC_REF_CLK, "sys_xgmac_ref_clk", "eth_clk", CCU_SYS_XGMAC_BASE, 8), CCU_DIV_FIXED_INFO(CCU_SYS_XGMAC_PTP_CLK, "sys_xgmac_ptp_clk", - "eth_clk", 10), + "eth_clk", 8), CCU_DIV_GATE_INFO(CCU_SYS_USB_CLK, "sys_usb_clk", "eth_clk", CCU_SYS_USB_BASE, 10), CCU_DIV_VAR_INFO(CCU_SYS_PVT_CLK, "sys_pvt_clk", |