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| author | Stephen Boyd <sboyd@kernel.org> | 2023-06-12 21:24:26 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-06-12 21:24:26 +0300 |
| commit | 29d70888100990d88e518bd7ab5b01520fcdeddf (patch) | |
| tree | b9a8688dc91ea98cb6833a06999f7f1e80198ae8 /drivers/clk | |
| parent | ac9a78681b921877518763ba0e89202254349d1b (diff) | |
| parent | ca1170b69968233b34d26432245eddf7d265186b (diff) | |
| download | linux-29d70888100990d88e518bd7ab5b01520fcdeddf.tar.xz | |
Merge tag 'sunxi-clk-for-6.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull an Allwinner clk driver update from Jernej Skrabec:
- Preselect PLL MIPI as TCON0 parent for A64 SoC
* tag 'sunxi-clk-for-6.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c index 41519185600a..eb36f8f77d55 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c @@ -528,11 +528,18 @@ static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_parents, 0x104, 0, 4, 24, 3, BIT(31), CLK_SET_RATE_PARENT); +/* + * DSI output seems to work only when PLL_MIPI selected. Set it and prevent + * the mux from reparenting. + */ +#define SUN50I_A64_TCON0_CLK_REG 0x118 + static const char * const tcon0_parents[] = { "pll-mipi", "pll-video0-2x" }; static const u8 tcon0_table[] = { 0, 2, }; static SUNXI_CCU_MUX_TABLE_WITH_GATE(tcon0_clk, "tcon0", tcon0_parents, tcon0_table, 0x118, 24, 3, BIT(31), - CLK_SET_RATE_PARENT); + CLK_SET_RATE_PARENT | + CLK_SET_RATE_NO_REPARENT); static const char * const tcon1_parents[] = { "pll-video0", "pll-video1" }; static const u8 tcon1_table[] = { 0, 2, }; @@ -953,6 +960,11 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev) writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG); + /* Set PLL MIPI as parent for TCON0 */ + val = readl(reg + SUN50I_A64_TCON0_CLK_REG); + val &= ~GENMASK(26, 24); + writel(val | (0 << 24), reg + SUN50I_A64_TCON0_CLK_REG); + ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_a64_ccu_desc); if (ret) return ret; |