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authorRick Chen <rickchen36@gmail.com>2017-12-11 10:53:15 +0300
committerGreentime Hu <greentime@andestech.com>2018-02-22 05:44:36 +0300
commit35dbb74aa752cff90e8dac1a24ed2a452aed0251 (patch)
treeabc5f51bd1582b665b0b7ec5d8b180b61762ff66 /drivers/clocksource/Kconfig
parenteac8173e7b99b215a386391dc95f5e4d7e4d7085 (diff)
downloadlinux-35dbb74aa752cff90e8dac1a24ed2a452aed0251.tar.xz
clocksource/drivers/atcpit100: Add andestech atcpit100 timer
ATCPIT100 is often used on the Andes architecture, This timer provide 4 PIT channels. Each PIT channel is a multi-function timer, can be configured as 32,16,8 bit timers or PWM as well. For system timer it will set channel 1 32-bit timer0 as clock source and count downwards until underflow and restart again. It also set channel 0 32-bit timer0 as clock event and count downwards until condition match. It will generate an interrupt for handling periodically. Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Add andestech atcpit100 timer
Diffstat (limited to 'drivers/clocksource/Kconfig')
-rw-r--r--drivers/clocksource/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index b3b4ed9b6874..19d65fe0627e 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -591,4 +591,13 @@ config CLKSRC_ST_LPC
Enable this option to use the Low Power controller timer
as clocksource.
+config ATCPIT100_TIMER
+ bool "ATCPIT100 timer driver"
+ depends on NDS32 || COMPILE_TEST
+ depends on HAS_IOMEM
+ select TIMER_OF
+ default NDS32
+ help
+ This option enables support for the Andestech ATCPIT100 timers.
+
endmenu