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authorLinus Torvalds <torvalds@linux-foundation.org>2022-08-07 01:04:48 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2022-08-07 01:04:48 +0300
commit4d1044fcb996e8de9b9ab392f4a767890e45202d (patch)
tree313e247b709dbfd375c73f390e8698f1154bc6f5 /drivers/clocksource
parentea0c39260d0c1d8e11d89c9d42ca48e172d1c868 (diff)
parentba6cfef057e1c594c456627aad81c2343fdb5d13 (diff)
downloadlinux-4d1044fcb996e8de9b9ab392f4a767890e45202d.tar.xz
Merge tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt: - Enabling the FPU is now a static_key - Improvements to the Svpbmt support - CPU topology bindings for a handful of systems - Support for systems with 64-bit hart IDs - Many settings have been enabled in the defconfig, including both support for the StarFive systems and many of the Docker requirements There are also a handful of cleanups and improvements, as usual. * tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (28 commits) riscv: enable Docker requirements in defconfig riscv: convert the t-head pbmt errata to use the __nops macro riscv: introduce nops and __nops macros for NOP sequences RISC-V: Add fast call path of crash_kexec() riscv: mmap with PROT_WRITE but no PROT_READ is invalid riscv/efi_stub: Add 64bit boot-hartid support on RV64 riscv: cpu: Add 64bit hartid support on RV64 riscv: smp: Add 64bit hartid support on RV64 riscv: spinwait: Fix hartid variable type riscv: cpu_ops_sbi: Add 64bit hartid support on RV64 riscv: dts: sifive: "fix" pmic watchdog node name riscv: dts: canaan: Add k210 topology information riscv: dts: sifive: Add fu740 topology information riscv: dts: sifive: Add fu540 topology information riscv: dts: starfive: Add JH7100 CPU topology RISC-V: Add CONFIG_{NON,}PORTABLE riscv: config: enable SOC_STARFIVE in defconfig riscv: dts: microchip: Add mpfs' topology information riscv: Kconfig.socs: Add comments riscv: Kconfig.erratas: Add comments ...
Diffstat (limited to 'drivers/clocksource')
-rw-r--r--drivers/clocksource/timer-riscv.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index 593d5a957b69..e460df7ed799 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -101,20 +101,21 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
static int __init riscv_timer_init_dt(struct device_node *n)
{
- int cpuid, hartid, error;
+ int cpuid, error;
+ unsigned long hartid;
struct device_node *child;
struct irq_domain *domain;
- hartid = riscv_of_processor_hartid(n);
- if (hartid < 0) {
- pr_warn("Not valid hartid for node [%pOF] error = [%d]\n",
+ error = riscv_of_processor_hartid(n, &hartid);
+ if (error < 0) {
+ pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",
n, hartid);
- return hartid;
+ return error;
}
cpuid = riscv_hartid_to_cpuid(hartid);
if (cpuid < 0) {
- pr_warn("Invalid cpuid for hartid [%d]\n", hartid);
+ pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
return cpuid;
}
@@ -140,7 +141,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
return -ENODEV;
}
- pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
+ pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n",
__func__, cpuid, hartid);
error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
if (error) {