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authorAnup Patel <apatel@ventanamicro.com>2023-03-28 06:52:20 +0300
committerMarc Zyngier <maz@kernel.org>2023-04-08 13:26:24 +0300
commitfb0f3d281b7f81a11e210783940f3798c4744179 (patch)
tree146c5fa6ba26a9c8079ff4d908aa8d606d9af3d5 /drivers/clocksource
parent832f15f42646812b096bc67c0eac439291a0db1f (diff)
downloadlinux-fb0f3d281b7f81a11e210783940f3798c4744179.tar.xz
RISC-V: Allow marking IPIs as suitable for remote FENCEs
To do remote FENCEs (i.e. remote TLB flushes) using IPI calls on the RISC-V kernel, we need hardware mechanism to directly inject IPI from the supervisor mode (i.e. RISC-V kernel) instead of using SBI calls. The upcoming AIA IMSIC devices allow direct IPI injection from the supervisor mode (i.e. RISC-V kernel). To support this, we extend the riscv_ipi_set_virq_range() function so that IPI provider (i.e. irqchip drivers can mark IPIs as suitable for remote FENCEs. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230328035223.1480939-5-apatel@ventanamicro.com
Diffstat (limited to 'drivers/clocksource')
-rw-r--r--drivers/clocksource/timer-clint.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c
index 7ccc16dd6a76..9a55e733ae99 100644
--- a/drivers/clocksource/timer-clint.c
+++ b/drivers/clocksource/timer-clint.c
@@ -251,7 +251,7 @@ static int __init clint_timer_init_dt(struct device_node *np)
}
irq_set_chained_handler(clint_ipi_irq, clint_ipi_interrupt);
- riscv_ipi_set_virq_range(rc, BITS_PER_BYTE);
+ riscv_ipi_set_virq_range(rc, BITS_PER_BYTE, true);
clint_clear_ipi();
#endif