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authorHuacai Chen <chenhc@lemote.com>2014-06-26 07:41:27 +0400
committerRalf Baechle <ralf@linux-mips.org>2014-07-30 23:46:00 +0400
commit140e39c1e3d29f50e161f55cca60f60b80408c2a (patch)
treecf4fc2a0a1896dd80667ead4382012c308ba73ca /drivers/cpufreq/loongson2_cpufreq.c
parentbda4584cd943d7bb6cf677a8d694700c1984cf3e (diff)
downloadlinux-140e39c1e3d29f50e161f55cca60f60b80408c2a.tar.xz
MIPS: Loongson: Modify ChipConfig register definition
This patch is prepared for Multi-chip interconnection. Since each chip has a ChipConfig register, LOONGSON_CHIPCFG should be an array. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7185/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/cpufreq/loongson2_cpufreq.c')
-rw-r--r--drivers/cpufreq/loongson2_cpufreq.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/cpufreq/loongson2_cpufreq.c b/drivers/cpufreq/loongson2_cpufreq.c
index d4add8621944..9fa177206032 100644
--- a/drivers/cpufreq/loongson2_cpufreq.c
+++ b/drivers/cpufreq/loongson2_cpufreq.c
@@ -148,9 +148,9 @@ static void loongson2_cpu_wait(void)
u32 cpu_freq;
spin_lock_irqsave(&loongson2_wait_lock, flags);
- cpu_freq = LOONGSON_CHIPCFG0;
- LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
- LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
+ cpu_freq = LOONGSON_CHIPCFG(0);
+ LOONGSON_CHIPCFG(0) &= ~0x7; /* Put CPU into wait mode */
+ LOONGSON_CHIPCFG(0) = cpu_freq; /* Restore CPU state */
spin_unlock_irqrestore(&loongson2_wait_lock, flags);
local_irq_enable();
}